Ponencia | 2023 |
A Single-Event Latchup setup for high-precision AMS circuits
|
Proceedings of the European Test Symposium |
Artículo | 2023 |
Behavioral Model for High-Speed SAR ADCs With On-Chip References
|
IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS |
Ponencia | 2022 |
A methodology for defect detection in analog circuits based on causal feature selection
|
ICECS 2022 - 29th IEEE International Conference on Electronics, Circuits and Systems, Proceedings |
Artículo | 2021 |
Digital non-linearity calibration for ADCs with redundancy using a new LUT approach
|
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS |
Capítulo | 2020 |
AMS circuit budgets
|
Silicon Systems For Wireless Lan |
Capítulo | 2020 |
Analog front-end
|
Silicon Systems For Wireless Lan |
Ponencia | 2020 |
Calibration of capacitor mismatch and static comparator offset in SAR ADC with digital redundancy
|
Proceedings - IEEE International Symposium on Circuits and Systems |
Ponencia | 2020 |
Digital calibration of capacitor mismatch and comparison offset in Split-CDAC SAR ADCs with redundancy
|
NEWCAS 2020 - 18th IEEE International New Circuits and Systems Conference, Proceedings |
Ponencia | 2020 |
Fast simulation of non-linear circuits using semi-analytical solutions based on the matrix exponential
|
Proceedings - IEEE International Symposium on Circuits and Systems |
Capítulo | 2020 |
Full-custom implementation of analog and mixed-signal circuits
|
Silicon Systems For Wireless Lan |
Capítulo | 2020 |
Integration
|
Silicon Systems For Wireless Lan |
Ponencia | 2020 |
Non-linear calibration of pipeline ADCs using a histogram-based estimation of the redundant INL
|
NEWCAS 2020 - 18th IEEE International New Circuits and Systems Conference, Proceedings |
Ponencia | 2020 |
On-chip reduced-code static linearity test of Vcm-based switching SAR ADCs using an incremental analog-to-digital converter
|
Proceedings of the European Test Symposium |
Ponencia | 2020 |
Static linearity BIST for Vcm-based switching SAR ADCs using a reduced-code measurement technique
|
NEWCAS 2020 - 18th IEEE International New Circuits and Systems Conference, Proceedings |
Artículo | 2019 |
Assessing AMS-RF Test Quality by Defect Simulation
|
IEEE TRANSACTIONS ON DEVICE AND MATERIALS RELIABILITY |
Artículo | 2019 |
Fast adaptive comparator offset calibration in pipeline ADC with self-repairing thermometer to binary encoder
|
INTERNATIONAL JOURNAL OF CIRCUIT THEORY AND APPLICATIONS |
Ponencia | 2019 |
Mismatch and Offset Calibration in Redundant SAR ADC
|
2019 34th Conference on Design of Circuits and Integrated Systems, DCIS 2019 |
Ponencia | 2019 |
Redundant SAR ADCs with Split-capacitor DAC
|
2018 25th IEEE International Conference on Electronics Circuits and Systems, ICECS 2018 |
Ponencia | 2018 |
AMS-RF test quality: Assessing defect severity.
|
2018 IEEE 24th International Symposium on On-Line Testing and Robust System Design, IOLTS 2018 |
Ponencia | 2018 |
Description of SAR ADCs with Digital Redundancy using a Unified Hardware-Based Approach
|
Proceedings - IEEE International Symposium on Circuits and Systems |
Artículo | 2017 |
Black-Box Calibration for ADCs With Hard Nonlinear Errors Using a Novel INL-Based Additive Code: A Pipeline ADC Case Study
|
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS |
Artículo | 2017 |
Fast Background Calibration of Sampling Timing Skew in SHA-Less Pipeline ADCs
|
IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS |
Ponencia | 2017 |
Likelihood-sampling adaptive fault simulation
|
Proceedings of the 2017 IEEE 22nd International Mixed-Signals Test Workshop, IMSTW 2017 |
Ponencia | 2017 |
On the limits of machine learning-based test: a calibrated mixed-signal system case study
|
Design Automation and Test in Europe Conference and Exhibition |
Ponencia | 2016 |
A 76nW, 4kS/s 10-bit SAR ADC with offset cancellation for biomedical applications
|
2016 IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2016 |
Ponencia | 2016 |
A compact R-2R DAC for BIST applications
|
2016 IEEE 21st International Mixed-Signal Testing Workshop, IMSTW 2016 |
Artículo | 2016 |
Design methodology for low-jitter differential clock recovery circuits in high performance ADCs
|
ANALOG INTEGRATED CIRCUITS AND SIGNAL PROCESSING |
Artículo | 2016 |
Design of an Energy-Efficient ZigBee Transceiver
|
MIXED-SIGNAL CIRCUITS |
Ponencia | 2016 |
Design trade-offs for on-chip driving of high-speed high-performance ADCs in static BIST applications
|
2016 IEEE 21st International Mixed-Signal Testing Workshop, IMSTW 2016 |
Ponencia | 2016 |
Linearity test of high-speed high-performance ADCs using a self-testable on-chip generator
|
2016 21TH IEEE EUROPEAN TEST SYMPOSIUM (ETS) |
Ponencia | 2016 |
Low-jitter differential clock driver circuits for high-performance high-resolution ADCs
|
2015 Conference on Design of Circuits and Integrated Systems, DCIS 2015 |
Ponencia | 2015 |
An approach to the design of low-jitter differential clock recovery circuits for high performance ADCs
|
2015 IEEE 6TH LATIN AMERICAN SYMPOSIUM ON CIRCUITS & SYSTEMS (LASCAS) |
Artículo | 2015 |
Background Digital Calibration of Comparator Offsets in Pipeline ADCs
|
IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS |
Ponencia | 2014 |
Closed-loop Simulation Method for Evaluation of Static Offset in Discrete-Time Comparators
|
2014 21ST IEEE INTERNATIONAL CONFERENCE ON ELECTRONICS, CIRCUITS AND SYSTEMS (ICECS) |
Ponencia | 2014 |
INL Systematic Reduced-Test Technique for Pipeline ADCs
|
2014 19TH IEEE EUROPEAN TEST SYMPOSIUM (ETS 2014) |
Ponencia | 2014 |
Power optimization and stage op-amp linearity relaxation in pipeline ADCs with digital comparator offset calibration
|
Proceedings of the 2014 29th Conference on Design of Circuits and Integrated Systems, DCIS 2014 |
Ponencia | 2014 |
Sigma-delta testability for pipeline A/D converters
|
Design Automation and Test in Europe Conference and Exhibition |
Ponencia | 2013 |
Inductor Characterization in RF LC-VCOs
|
2013 IEEE 4TH LATIN AMERICAN SYMPOSIUM ON CIRCUITS AND SYSTEMS (LASCAS) |
Ponencia | 2012 |
Analysis of Steady-State Common-Mode Response in Differential LC-VCOs
|
ISCAS 2012 - 2012 IEEE International Symposium on Circuits and Systems |
Ponencia | 2012 |
Self-biased Input Common-mode Generation for Improving Dynamic Range and Yield in Inverter-based Filters
|
2012 19th IEEE International Conference on Electronics, Circuits and Systems (ICECS) |
Artículo | 2011 |
Blind Adaptive Estimation of Integral Nonlinear Errors in ADCs Using Arbitrary Input Stimulus
|
IEEE TRANSACTIONS ON INSTRUMENTATION AND MEASUREMENT |
Ponencia | 2010 |
An adaptive BIST for INL estimation of ADCs without histogram evaluation
|
Proceedings of the 2010 IEEE 16th International Mixed-Signals, Sensors and Systems Test Workshop, IMS3TW 2010 |
Artículo | 2010 |
On Chopper Effects in Discrete-Time Sigma Delta Modulators
|
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS |
Ponencia | 2010 |
On-chip Biased Voltage-Controlled Oscillator with Temperature Compensation of the Oscillation Amplitude for Robust I/Q Generation
|
2010 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS |
Ponencia | 2010 |
Power optimization of CMOS programmable gain amplifiers with high dynamic range and common-mode feed-forward circuit
|
2010 IEEE International Conference on Electronics, Circuits, and Systems, ICECS 2010 - Proceedings |
Ponencia | 2009 |
A Survey on Digital Background Calibration of ADCs
|
2009 EUROPEAN CONFERENCE ON CIRCUIT THEORY AND DESIGN, VOLS 1 AND 2 |
Ponencia | 2009 |
On-line Estimation of the Integral Non-linear Errors in Analogue-to-Digital Converters without Histogram Evaluation
|
2009 EUROPEAN CONFERENCE ON CIRCUIT THEORY AND DESIGN, VOLS 1 AND 2 |
Ponencia | 2009 |
Random chopping in ΣΔ modulators
|
XXIV Conference on Design of Circuits and Integrated Systems (2009) |
Ponencia | 2008 |
A 1.2V 5.14mW Quadrature Frequency Synthesizer in 90nm CMOS Technology for 2.4GHz ZigBee Applications
|
2008 IEEE ASIA PACIFIC CONFERENCE ON CIRCUITS AND SYSTEMS (APCCAS 2008), VOLS 1-4 |
Ponencia | 2008 |
A 2.5MHz bandpass active complex filter With 2.4MHz bandwidth for wireless communications
|
23rd Conference on Design of Circuits and Integrated Systems (2008) |
Ponencia | 2008 |
A 5GHz Wide Tuning Range LC-VCO in Sub-micrometer CMOS Technology
|
2008 IEEE ASIA PACIFIC CONFERENCE ON CIRCUITS AND SYSTEMS (APCCAS 2008), VOLS 1-4 |
Artículo | 2008 |
New swapping technique for background calibration of capacitor mismatch and amplifier finite DC-gain in pipeline ADCs
|
ANALOG INTEGRATED CIRCUITS AND SIGNAL PROCESSING |
Ponencia | 2007 |
Improved background algorithms for pipeline ADC full calibration
|
2007 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOLS 1-11 |
Ponencia | 2007 |
Novel Swapping Technique for Background Calibration of Capacitor Mismatching in Pipeline ADCs
|
SBCCI2007: 20TH SYMPOSIUM ON INTEGRATED CIRCUITS AND SYSTEMS DESIGN |
Ponencia | 2006 |
Statistical analysis of a background correlation-based technique for full calibration of pipeline ADCs
|
2006 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOLS 1-11, PROCEEDINGS |
Ponencia | 2005 |
Full calibration digital techniques for pipeline ADCs
|
2005 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS), VOLS 1-6, CONFERENCE PROCEEDINGS |
Artículo | 2005 |
Noisy signal based background technique for gain error correction in pipeline ADCs
|
IEE PROCEEDINGS-COMPUTERS AND DIGITAL TECHNIQUES |
Ponencia | 2004 |
Digital background gain error correction in pipeline ADCs
|
DESIGN, AUTOMATION AND TEST IN EUROPE CONFERENCE AND EXHIBITION, VOLS 1 AND 2, PROCEEDINGS |
Ponencia | 2003 |
Digital background calibration technique for pipeline ADCs with multi-bit stages
|
16TH SYMPOSIUM ON INTEGRATED CIRCUITS AND SYSTEMS DESIGN, SBCCI 2003, PROCEEDINGS |
Ponencia | 2002 |
A mixed-signal design reuse methodology based on parametric behavioural models with non-ideal effects
|
DESIGN, AUTOMATION AND TEST IN EUROPE CONFERENCE AND EXHIBITION, 2002 PROCEEDINGS |