Ver Investigador - - Prisma - Unidad de Bibliometría

Macarena Cristina Martinez Rodriguez

TITULADO SUPERIOR
mmartinez30@us.es

Investiga en

Tipo Año Título Fuente
Ponencia2024 Cryptographic Security Through a Hardware Root of Trust Lecture Notes in Computer Science
Ponencia2024 Digital Design Flow Based on Open Tools for Programmable Logic Devices 16th Congreso de Tecnologia, Aprendizaje y Ensenanza de la Electronica, TAEE 2024
Ponencia2023 A Simple Power Analysis of an FPGA implementation of a polynomial multiplier for the NTRU cryptosystem 2023 38th Conference on Design of Circuits and Integrated Systems, DCIS 2023
Artículo2023 Timing-attack-resistant acceleration of NTRU round 3 encryption on resource-constrained embedded systems Cryptography
Artículo2022 Efficient RO-PUF for generation of identifiers and keys in resource-constrained embedded systems Cryptography
Ponencia2022 Graphic user interface for learning communications physics 15th International Conference of Technology, Learning and Teaching of Electronics, TAEE 2022 - Proceedings
Ponencia2022 Learning about nanodevices using experimental characterization equipment 15th International Conference of Technology, Learning and Teaching of Electronics, TAEE 2022 - Proceedings
Artículo2022 Multi-Unit Serial Polynomial Multiplier to Accelerate NTRU-Based Cryptographic Schemes in IoT Embedded Systems. SENSORS
Artículo2021 A Configurable RO-PUF for Securing Embedded Systems Implemented on Programmable Devices ELECTRONICS
Ponencia2021 Attestation Waves: Platform Trust via Remote Power Analysis Lecture Notes in Computer Science
Ponencia2021 Design Flow to Evaluate the Performance of Ring Oscillator PUFs on FPGAs 36th Conference on Design of Circuits and Integrated Systems, DCIS 2021
Ponencia2021 SoK: remote power analysis ARES 2021: the 16th International Conference on availability, reliability and security
Artículo2021 Timing-Optimized Hardware Implementation to Accelerate Polynomial Multiplication in the NTRU Algorithm ACM Journal on Emerging Technologies in Computing Systems
Ponencia2020 Accelerating the Development of NTRU Algorithm on Embedded Systems 2020 35th Conference on Design of Circuits and Integrated Systems, DCIS 2020
Artículo2018 A comparative analysis of VLSI trusted virtual sensors MICROPROCESSORS AND MICROSYSTEMS
Artículo2018 VLSI Design of Trusted Virtual Sensors SENSORS
Ponencia2017 CMOS Digital Design of a Trusted Virtual Sensor 2017 IEEE NORDIC CIRCUITS AND SYSTEMS CONFERENCE (NORCAS): NORCHIP AND INTERNATIONAL SYMPOSIUM OF SYSTEM-ON-CHIP (SOC)
Artículo2016 Application specific integrated circuit solution for multi-input multi-output piecewise-affine functions INTERNATIONAL JOURNAL OF CIRCUIT THEORY AND APPLICATIONS
Ponencia2015 Dedicated hardware IP module for extracting singular points from fingerprints 2014 21st IEEE International Conference on Electronics, Circuits and Systems, ICECS 2014
Artículo2015 Digital VLSI Implementation of Piecewise-Affine Controllers Based on Lattice Approach IEEE TRANSACTIONS ON CONTROL SYSTEMS TECHNOLOGY
Ponencia2015 Programmable ASICs for Model Predictive Control 2015 IEEE INTERNATIONAL CONFERENCE ON INDUSTRIAL TECHNOLOGY (ICIT)
Artículo2013 A programmable and configurable ASIC to generate piecewise-affine functions defined over general partitions IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS
Ponencia2012 ASIC-in-the-loop methodology for verification of piecewise affine controllers 2012 19th IEEE International Conference on Electronics, Circuits and Systems (ICECS)
Ponencia2012 Reducing bit flipping problems in SRAM physical unclonable functions for chip identification 2012 19th IEEE International Conference on Electronics, Circuits and Systems (ICECS)
Ponencia2011 Circuit implementation of piecewise-affine functions based on lattice representation 2011 20th European Conference on Circuit Theory and Design, ECCTD 2011
Ponencia2011 Design methodology for FPGA implementation of lattice piecewise-affine functions 2011 International Conference on Field-Programmable Technology, FPT 2011

Proyectos de Investigación

Fecha de inicio Fecha de fin Rol Denominación Agencia financiadora
01/09/2021 31/08/2025 Investigador/a Diseño, implementación y validación en hardware de una raíz de confianza resistente a ataques, para sistemas empotrados seguros (PID2020-116664RB-I00) Ministerio de Ciencia e Innovación (Nacional)
13/01/2009 31/12/2013 Contratado Diseño Microelectrónico para Autenticación Cripto-Biométrica (P08-TIC-03674) Junta de Andalucía - Consejería de Innovación, Ciencia y Empresas (Autonómico)
01/12/2009 30/11/2012 Contratado Model-based synthesis of digital electronic circuits for embedded control (MOBY-DIC) (FP7-ICT-2009-4-248858) Commission of the European Communities (Research Directorate-General) (Europeo)
17/07/2012 31/12/2014 Contratado Gestión Documental con autenticación segura mediante técnicas Cripto-Biométricas vía hardware (CB-doc). (IPT-2012-0695-390000) Ministerio de Economía y Competitividad (Nacional)
01/01/2015 31/12/2018 Contratado Diseño de Hardware Cripto-Biométrico para Cifrado y Autenticación de Vídeo (TEC2014-57971-R) Ministerio de Economía y Competitividad (Nacional)
01/01/2018 30/09/2021 Contratado Diseño de Soluciones Hardware para Gestionar con Confianza, Seguridad y Privacidad la Identidad de las Personas y cosas en el Marco de la Iot (TEC2017-83557-R) Ministerio de Economía y Competitividad (Nacional)
01/01/2018 31/12/2020 Contratado Hardware-Based Security for Blockchain Technologies (Hardblock) (RTC-2017-6595-7) Ministerio de Ciencia, Innovación y Universidades (Nacional)
El investigador no tiene ningún resultado de investigación asociado