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Andres Santana Andreo

Predoctoral PIF FPI Ministerio
asandreo@us.es
Área de conocimiento: Electrónica
Departamento: Electrónica y Electromagnetismo
Grupo: Sin grupo

Investiga en

Tipo Año Título Fuente
Artículo2024 Reliability improvement of SRAM PUFs based on a detailed experimental study into the stochastic effects of aging AEU-INTERNATIONAL JOURNAL OF ELECTRONICS AND COMMUNICATIONS
Ponencia2024 Streamlined design methodology for Cell-Based DCOs Proceedings - 2024 20th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design, SMACD 2024
Ponencia2023 A detailed, cell-by-cell look into the effects of aging on an SRAM PUF using a specialized test array Proceedings - 2023 19th International Conference on Synthesis, Modeling, Analysis and Simulation Methods, and Applications to Circuit Design, SMACD 2023
Ponencia2023 A Test Module for Aging Characterization of Digital Circuits Proceedings - 2023 19th International Conference on Synthesis, Modeling, Analysis and Simulation Methods, and Applications to Circuit Design, SMACD 2023
Artículo2022 A DRV-based bit selection method for SRAM PUF key generation and its impact on ECCs INTEGRATION-THE VLSI JOURNAL
Ponencia2022 A smart SRAM-cell array for the experimental study of variability phenomena in CMOS technologies IEEE International Reliability Physics Symposium Proceedings
Ponencia2022 Characterization and analysis of BTI and HCI effects in CMOS current mirrors Proceedings - 2022 18th International Conference on Synthesis, Modeling, Analysis and Simulation Methods, and Applications to Circuit Design, SMACD 2022
Ponencia2022 Characterizing Aging Degradation of Integrated Circuits with a Versatile Custom Array of Reliability Test Structures IEEE International Conference on Microelectronic Test Structures
Ponencia2022 Impact of BTI and HCI on the reliability of a Majority Voter Proceedings - 2022 18th International Conference on Synthesis, Modeling, Analysis and Simulation Methods, and Applications to Circuit Design, SMACD 2022
Ponencia2022 On the use of an RTN simulator to explore the quality trade-offs of a novel RTN-based PUF Proceedings - 2022 18th International Conference on Synthesis, Modeling, Analysis and Simulation Methods, and Applications to Circuit Design, SMACD 2022
Artículo2021 Improving the reliability of SRAM-based PUFs under varying operation conditions and aging degradation MICROELECTRONICS RELIABILITY
Este investigador no ha dirigido/tutorizado tesis

Proyectos de Investigación

Fecha de inicio Fecha de fin Rol Denominación Agencia financiadora
30/12/2016 29/06/2021 Contratado Dispositivos, Circuitos y Arquitecturas Fiables y de Bajo Consumo para Iot (TEC2016-75151-C3-3-R) Ministerio de Economía y Competitividad (Nacional)
01/06/2020 29/02/2024 Contratado The Variability Challenge in Nano-CMOS: from Device Modeling to IC Design for Mitigation and Exploitation (Vigilant-Imse) (PID2019-103869RB-C31) Ministerio de Ciencia, Innovación y Universidades (Nacional)
01/06/2020 29/02/2024 Contratado The Variability Challenge in Nano-CMOS: from Device Modeling to IC Design for Mitigation and Exploitation (Vigilant-Imse) (PID2019-103869RB-C31) Ministerio de Ciencia, Innovación y Universidades (Nacional)
01/09/2023 31/08/2027 Investigador/a Fiabilidad, seguridad y eficiencia energética en dispositivos y circuitos electrónicos para IoT edge (TIRELESS-IMSE) (PID2022-136949OB-C21) Ministerio de Ciencia e Innovación (Nacional)
El investigador no tiene ningún resultado de investigación asociado