| Ponencia | 2024 |
Aprendizaje de diseño digital basado en proyectos:: Uso de leds RGB
|
XVI Congreso de Tecnología, Aprendizaje y Enseñanza de la Electrónica (TAEE 2024). Libro de actas: XVI Conferência em Tecnologia, Aprendizagem e Ensino da Eletrónica (TAEE 2024). Livro de atas.XVI International Conference of Technology, Learning and Teaching of Electronics (TAEE 2024). Proceedings book |
| Capítulo | 2024 |
Auto-tuning System for Maximum Operating Frequency in FPGA by Dynamic Reconfiguration
|
Springer Proceedings in Materials |
| Ponencia | 2024 |
Project-based learning of digital design: Using RGB LEDs
|
16th Congreso de Tecnologia, Aprendizaje y Ensenanza de la Electronica, TAEE 2024 |
| Capítulo | 2022 |
Enseñanza basada en diseños propuestos por los alumnos: caso práctico
|
Libro de actas TAEE 2022 XV Congreso de Tecnología, Aprendizaje y Enseñanza de la Electrónica: Livro de procedimentos TAEE 2022 XV Conferência em Tecnologia, Aprendizagem e Ensino da Eletrónica=Proceedings book TAEE 2022 XV International Conference of Technology, Learning and Teaching of Electronics |
| Ponencia | 2022 |
ICs tester design and its effect on application in electronics laboratories
|
15th International Conference of Technology, Learning and Teaching of Electronics, TAEE 2022 - Proceedings |
| Ponencia | 2022 |
Teaching based on proposed by students designs: a case study
|
15th International Conference of Technology, Learning and Teaching of Electronics, TAEE 2022 - Proceedings |
| Artículo | 2020 |
An academic approach to FPGA design based on a distance meter circuit
|
IEEE REVISTA IBEROAMERICANA DE TECNOLOGIAS DEL APRENDIZAJE-IEEE RITA |
| Artículo | 2020 |
Breaking trivium stream cipher implemented in ASIC using experimental attacks and DFA
|
SENSORS |
| Ponencia | 2020 |
Desarrollo de un juego sobre FPGA mediante trabajo en equipo
|
XIV Congreso de Tecnologías Aplicadas a la Enseñanza de la Electrónica: Proceedings TAEE2020 = XIV Conferência em Tecnologias Aplicadas ao Ensino da Eletrónica = XIV Conference on Technology, Teaching and Learning of Electronics |
| Ponencia | 2020 |
Learning VHDL through teamwork FPGA game design
|
Proceedings - 2020 14th Technologies Applied to Electronics Teaching Conference, TAEE 2020 |
| Ponencia | 2019 |
Floorplanning as a practical countermeasure against clock fault attack in Trivium stream cipher
|
Proceedings - 33rd Conference on Design of Circuits and Integrated Systems, DCIS 2018 |
| Ponencia | 2018 |
Distance measurement as a practical example of FPGA design
|
2018 XIII TECHNOLOGIES APPLIED TO ELECTRONICS TEACHING CONFERENCE (TAEE) |
| Ponencia | 2018 |
Ejemplo de diseño FPGA para medidas de máximas frecuencias de operación
|
Tecnología, Aprendizaje y Enseñanza de la Electrónica : Actas del XIII Congreso de Tecnología, Aprendizaje y Enseñanzade la Electrónica, Tenerife, 20-22 de junio, 2018 |
| Ponencia | 2018 |
FPGA design example for maximum operating frequency measurements
|
2018 XIII TECHNOLOGIES APPLIED TO ELECTRONICS TEACHING CONFERENCE (TAEE) |
| Ponencia | 2018 |
Medición de distancias como ejemplo práctico de diseño en FPGAs
|
Tecnología, Aprendizaje y Enseñanza de la Electrónica : Actas del XIII Congreso de Tecnología, Aprendizaje y Enseñanzade la Electrónica, Tenerife, 20-22 de junio, 2018 |
| Ponencia | 2016 |
Creating helping posters for electronic labs
|
Proceedings of 2016 Technologies Applied to Electronics Teaching, TAEE 2016 |
| Ponencia | 2016 |
Diseño de circuitos integrados y seguridad de circuitos criptográficos frente a ataques
|
III Jornada de investigación y postgrado: Libro de Actas |
| Ponencia | 2016 |
Educational applications of a pico-processor design
|
Proceedings of 2016 Technologies Applied to Electronics Teaching, TAEE 2016 |
| Ponencia | 2010 |
An Improved Differential Pull-down Network Logic Configuration for DPA Resistant Circuits
|
2010 INTERNATIONAL CONFERENCE ON MICROELECTRONICS |
| Ponencia | 2010 |
Optimization of clock-gating Structures for low-leakage high-performance Applications
|
2010 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS |
| Ponencia | 2010 |
Switching noise optimization in the wake-up phase of leakage-aware power gating structures
|
INTEGRATED CIRCUIT AND SYSTEM DESIGN: POWER AND TIMING MODELING, OPTIMIZATION AND SIMULATION |
| Ponencia | 2007 |
A methodology for switching noise estimation at gate level
|
VLSI CIRCUITS AND SYSTEMS III |
| Ponencia | 2007 |
A switching noise vision of the optimization techniques for low-power synthesis
|
2007 EUROPEAN CONFERENCE ON CIRCUIT THEORY AND DESIGN, VOLS 1-3 |
| Ponencia | 2007 |
Effects of buffer insertion on the average/peak power ratio in CMOS VLSI digital circuits
|
VLSI CIRCUITS AND SYSTEMS III |
| Artículo | 2006 |
Optimization of master-slave flip-flops for high-performance applications
|
INTEGRATED CIRCUIT AND SYSTEM DESIGN: POWER AND TIMING MODELING, OPTIMIZATION AND SIMULATION |
| Ponencia | 2005 |
Application of clock gating techniques at a flip-flop level to switching noise reduction in VLSI circuits
|
VLSI CIRCUITS AND SYSTEMS II, PTS 1 AND 2 |
| Ponencia | 2005 |
Performance analysis of full adders in CMOS technologies
|
VLSI CIRCUITS AND SYSTEMS II, PTS 1 AND 2 |
| Artículo | 2005 |
Selective Clock-Gating for Low-Power Synchronous Counters
|
JOURNAL OF LOW POWER ELECTRONICS |
| Artículo | 2003 |
A new hybrid CBL-CMOS cell for optimum noise/power application
|
INTEGRATED CIRCUIT AND SYSTEM DESIGN |
| Ponencia | 2003 |
Analysis of current-mode flip-flops in CMOS technologies
|
VLSI CIRCUITS AND SYSTEMS |
| Ponencia | 2003 |
Switching noise reduction in clock distribution in mixed-mode VLSI circuits
|
VLSI CIRCUITS AND SYSTEMS |
| Artículo | 2002 |
A technique to generate CMOS VLSI flip-flops based on differential latches
|
Lecture Notes in Computer Science |
| Artículo | 2002 |
Analysis of high-performance flip-flops for submicron mixed-signal applications
|
ANALOG INTEGRATED CIRCUITS AND SIGNAL PROCESSING |
| Artículo | 2002 |
High-performance edge-triggered flip-flops using weak-branch differential latch
|
ELECTRONICS LETTERS |
| Artículo | 2002 |
Selective clock-gating for low power/low noise synchronous counters
|
Lecture Notes in Computer Science |
