Finalizada su relación laboral con la US, este perfil no se actualiza.

Bernabe Linares Barranco

Profesor Asociado

blinares@us.es

Prog. doctorado: CIENCIAS Y TECNOLOGÍAS FÍSICAS

0000-0002-1813-4889

H-6886-2012

35617761100

A5025922642

Investiga en

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Artículo: 98

Revisión: 4

Ponencia: 125

Capítulo: 2

Letter: 2

Nota: 1

TOTAL: 232

Tipo	Año	Título	Fuente
Artículo	2025	Time series segmentation for recognition of epileptiform patterns recorded via microelectrode arrays in vitro	PLOS ONE
Artículo	2024	A 128×128 Electronically Multi-Foveated Dynamic Vision Sensor with Real-Time Resolution Reconfiguration	IEEE ACCESS
Artículo	2024	A CMOS-compatible oscillation-based VO2 Ising machine solver	NATURE COMMUNICATIONS
Artículo	2024	A fully digital relaxation-aware analog programming technique for HfOx RRAM arrays	IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS
Revisión	2024	A Review of Ising Machines Implemented in Conventional and Emerging Technologies	IEEE TRANSACTIONS ON NANOTECHNOLOGY
Ponencia	2024	Applying Hodgkin-Huxley Neuron Model for Perovskite Memristor in Circuit Simulation	2024 IEEE International Conference on Metrology for eXtended Reality, Artificial Intelligence and Neural Engineering, MetroXRAINE 2024 - Proceedings
Ponencia	2024	Mismatch calibration strategy for query-driven AER read-out in a memristor-CMOS neuromorphic chip	Proceedings - IEEE International Symposium on Circuits and Systems
Ponencia	2024	Neuromorphic Technology Insights in Spain	24th IEEE International Conference on Nanotechnology, NANO 2024
Artículo	2024	Roadmap to neuromorphic computing with emerging technologies	APL MATERIALS
Ponencia	2024	Single-Ended to Differential Fully-Integrated LNA for Low Voltage Supply Applications	2024 31st IEEE International Conference on Electronics, Circuits and Systems (ICECS)
Artículo	2024	Spin hall nano-oscillator empirical electrical model for optimal on-chip detector design	IEEE TRANSACTIONS ON ELECTRON DEVICES
Ponencia	2023	A Memristor-Inspired Computation for Epileptiform Signals in Spheroids	AICAS 2023 - IEEE International Conference on Artificial Intelligence Circuits and Systems, Proceeding
Ponencia	2023	A multi-core memristor chip for Stochastic Binary STDP	Proceedings - IEEE International Symposium on Circuits and Systems
Ponencia	2023	An Event-Based Tracking Control Framework for Multirotor Aerial Vehicles Using a Dynamic Vision Sensor and Neuromorphic Hardware	IEEE International Conference on Intelligent Robots and Systems
Ponencia	2023	Characterization of HfOx 1T1R Memristors for Analog Programming	14th Spanish Conference on Electron Devices, CDE 2023 - Proceedings
Artículo	2023	CMOS front end for interfacing spin-hall nano-oscillators for neuromorphic computing in the GHz range	ELECTRONICS
Artículo	2023	Effect of device mismatches in differential oscillatory neural networks	IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS
Artículo	2023	Experimental demonstration of coupled differential oscillator networks for versatile applications	FRONTIERS IN NEUROSCIENCE
Artículo	2023	Learning algorithms for oscillatory neural networks as associative memory for pattern recognition	FRONTIERS IN NEUROSCIENCE
Artículo	2023	Operating Coupled VO-Based Oscillators for Solving Ising Models	IEEE JOURNAL ON EMERGING AND SELECTED TOPICS IN CIRCUITS AND SYSTEMS
Ponencia	2023	Performance comparison of DVS data spatial downscaling methods using Spiking Neural Networks	Proceedings - 2023 IEEE Winter Conference on Applications of Computer Vision, WACV 2023
Artículo	2023	Stakes of neuromorphic foveation: a promising future for embedded event cameras.	Biological cybernetics
Ponencia	2023	Study of foveation mechanisms in Dynamic Vision Sensors	2023 38th Conference on Design of Circuits and Integrated Systems, DCIS 2023
Artículo	2022	A CMOL-like memristor-CMOS neuromorphic chip-core demonstrating stochastic binary STDP	IEEE JOURNAL ON EMERGING AND SELECTED TOPICS IN CIRCUITS AND SYSTEMS
Artículo	2022	A CMOS-memristor hybrid system for implementing stochastic binary spike timing-dependent plasticity	PHILOSOPHICAL TRANSACTIONS OF THE ROYAL SOCIETY A-MATHEMATICAL PHYSICAL AND ENGINEERING SCIENCES
Ponencia	2022	A hybrid memristor/CMOS SNN for implementing one-shot winner-takes-all training	Proceedings - IEEE International Symposium on Circuits and Systems
Ponencia	2022	Electronically foveated dynamic vision sensor	2022 IEEE International Conference on Omni-Layer Intelligent Systems, COINS 2022
Ponencia	2022	Enhancing storage capabilities of oscillatory neural networks as associative memory	DCIS 2022 - Proceedings of the 37th Conference on Design of Circuits and Integrated Systems
Ponencia	2022	Event data downscaling for embedded computer vision	PROCEEDINGS OF THE 17TH INTERNATIONAL JOINT CONFERENCE ON COMPUTER VISION, IMAGING AND COMPUTER GRAPHICS THEORY AND APPLICATIONS (VISAPP), VOL 4
Artículo	2022	How frequency injection locking can train oscillatory neural networks to compute in phase	IEEE TRANSACTIONS ON NEURAL NETWORKS AND LEARNING SYSTEMS
Artículo	2022	Liquid state machine on SpiNNaker for spatio-temporal classification tasks	FRONTIERS IN NEUROSCIENCE
Ponencia	2022	Reliability analysis of a spiking neural network hardware accelerator	Proceedings of the 2022 Design, Automation and Test in Europe Conference and Exhibition, DATE 2022
Artículo	2022	SL-Animals-DVS: event-driven sign language animals dataset	PATTERN ANALYSIS AND APPLICATIONS
Ponencia	2022	System architectures for electronically foveated dynamic vision sensor	DCIS 2022 - Proceedings of the 37th Conference on Design of Circuits and Integrated Systems
Ponencia	2021	A real-time DSP-based biohybrid MEA system for seizure detection in vitro	2021 IEEE International Symposium on Medical Measurements and Applications, MeMeA 2021 - Conference Proceedings
Ponencia	2021	Baseline features extraction from microelectrode array recordings in an in vitro model of acute seizures using digital signal processing for electronic implementation	2021 IEEE International Conference on Omni-Layer Intelligent Systems, COINS 2021
Artículo	2021	Digital implementation of oscillatory neural network for image recognition applications	FRONTIERS IN NEUROSCIENCE
Artículo	2021	Hardware implementation of differential oscillatory neural networks using VO2-based oscillators and memristor-bridge circuits	FRONTIERS IN NEUROSCIENCE
Ponencia	2021	Implementation of binary stochastic STDP learning using chalcogenide-based memristive devices	Proceedings - IEEE International Symposium on Circuits and Systems
Artículo	2021	Insights into the dynamics of coupled VO2 oscillators for ONNs	IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS
Artículo	2021	Neuromorphic low-power inference on memristive crossbars with on-chip offset calibration	IEEE ACCESS
Ponencia	2021	Neuron fault tolerance in spiking neural networks	Proceedings -Design, Automation and Test in Europe, DATE
Ponencia	2021	Novel programmable single pulse generator for producing pulse widths in different time scales	Proceedings - International Workshop on Content-Based Multimedia Indexing
Artículo	2021	Oscillatory neural networks using VO2 based phase encoded logic	FRONTIERS IN NEUROSCIENCE
Ponencia	2020	A Current-Attenuator for Performing Read Operation in Memristor-Based Spiking Neural Networks	2020 35th Conference on Design of Circuits and Integrated Systems, DCIS 2020
Ponencia	2020	Auxiliary pulse-extender and current-attenuator circuits for flexible interaction with memristive crossbars in SNNs	ICECS 2020 - 27th IEEE International Conference on Electronics, Circuits and Systems, Proceedings
Ponencia	2020	Confession session: Lessons learned the hard way	Proceedings - IEEE International Symposium on Circuits and Systems
Artículo	2020	Enhanced Linearity in FD-SOI CMOS Body-Input Analog Circuits - Application to Voltage-Controlled Ring Oscillators and Frequency-Based sigma Delta ADCs	IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS
Artículo	2020	Event-driven implementation of deep spiking convolutional neural networks for supervised classification using the SpiNNaker neuromorphic platform	NEURAL NETWORKS
Ponencia	2020	Experimental body-input three-stage DC offset calibration scheme for memristive crossbar	Proceedings - IEEE International Symposium on Circuits and Systems
Ponencia	2020	Implementation of a tunable spiking neuron for STDP with memristors in FDSOI 28nm	Proceedings - 2020 IEEE International Conference on Artificial Intelligence Circuits and Systems, AICAS 2020
Ponencia	2020	Oscillatory Hebbian Rule (OHR): an adaption of the Hebbian rule to Oscillatory Neural Networks	2020 35th Conference on Design of Circuits and Integrated Systems, DCIS 2020
Ponencia	2020	Spiking neuron hardware-level fault modeling	Proceedings - 2020 26th IEEE International Symposium on On-Line Testing and Robust System Design, IOLTS 2020
Ponencia	2020	Using neural networks for optimum band selection in cognitive-radio systems	ICECS 2020 - 27th IEEE International Conference on Electronics, Circuits and Systems, Proceedings
Ponencia	2019	A current attenuator for efficient memristive crossbars read-out	2019 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS)
Artículo	2019	Asynchronous Spiking Neurons, the natural key to exploit temporal sparsity	IEEE JOURNAL ON EMERGING AND SELECTED TOPICS IN CIRCUITS AND SYSTEMS
Ponencia	2019	Digital-signal-processor realization of izhikevich neural network for real-time interaction with electrophysiology experiments	2019 26th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2019
Ponencia	2019	Learning weights with STDP to build prototype images for classification	Proceedings - 2019 14th IEEE International Conference on Design and Technology of Integrated Systems In Nanoscale Era, DTIS 2019
Ponencia	2019	Low-power hardware implementation of SNN with decision block for recognition tasks	2019 26th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2019
Revisión	2019	Neuromorphic spiking neural networks and their memristor-CMOS hardware implementations	MATERIALS
Ponencia	2019	Scene Context Classification with Event-Driven Spiking Deep Neural Networks	2018 25th IEEE International Conference on Electronics Circuits and Systems, ICECS 2018
Ponencia	2019	Self-Testing Analog Spiking Neuron Circuit	SMACD 2019 - 16th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design, Proceedings
Capítulo	2019	Spike-timing-dependent-plasticity with memristors	Handbook of Memristor Networks
Artículo	2018	A Configurable Event-Driven Convolutional Node with Rate Saturation Mechanism for Modular ConvNet Systems Implementation	FRONTIERS IN NEUROSCIENCE
Artículo	2018	Active Perception with Dynamic Vision Sensors. Minimum Saccades with Optimum Recognition	IEEE TRANSACTIONS ON BIOMEDICAL CIRCUITS AND SYSTEMS
Ponencia	2018	An Intrinsic Method for Fast Parameter Update on the SpiNNaker Platform	Proceedings - IEEE International Symposium on Circuits and Systems
Ponencia	2018	Bulk-based DC offset calibration for low-power memristor array read-out system	2017 32nd Conference on Design of Circuits and Integrated Systems, DCIS 2017 - Proceedings
Artículo	2018	Calibration of offset via bulk for low-power HfO2 based 1T1R memristive crossbar read-out system	MICROELECTRONIC ENGINEERING
Ponencia	2018	Event-Driven Configurable Module with Refractory Mechanism for ConvNets on FPGA	Proceedings - IEEE International Symposium on Circuits and Systems
Artículo	2018	Event-Driven Stereo Visual Tracking Algorithm to Solve Object Occlusion	IEEE TRANSACTIONS ON NEURAL NETWORKS AND LEARNING SYSTEMS
Ponencia	2018	Hybrid Neural Network, An Efficient Low-Power Digital Hardware Implementation of Event-based Artificial Neural Network	Proceedings - IEEE International Symposium on Circuits and Systems
Artículo	2018	On practical issues for stochastic STDP hardware with 1-bit synaptic weights	FRONTIERS IN NEUROSCIENCE
Artículo	2018	Performance Comparison of Time-Step-Driven versus Event-Driven Neural State Update Approaches in SpiNNaker	2018 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS)
Ponencia	2018	Scene Context Classification with Event-Driven Spiking Deep Neural Networks	2018 25TH IEEE INTERNATIONAL CONFERENCE ON ELECTRONICS, CIRCUITS AND SYSTEMS (ICECS)
Ponencia	2018	Spiking hough for shape recognition	Lecture Notes in Computer Science
Artículo	2017	An Event-Driven Classifier for Spiking Neural Networks Fed with Synthetic or Dynamic Vision Sensor Data	FRONTIERS IN NEUROSCIENCE
Ponencia	2017	Hardware implementation of convolutional STDP for on-line visual feature learning	Proceedings - IEEE International Symposium on Circuits and Systems
Ponencia	2017	Live demonstration: Hardware implementation of convolutional STDP for on-line visual feature learning	Proceedings - IEEE International Symposium on Circuits and Systems
Ponencia	2017	Live demonstration: Multiplexing AER asynchronous channels over LVDS links with flow-control and clock-correction for scalable neuromorphic systems	Proceedings - IEEE International Symposium on Circuits and Systems
Ponencia	2017	Multiplexing AER asynchronous channels over LVDS links with flow-control and clock-correction for scalable neuromorphic systems	2017 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS)
Artículo	2017	On Multiple AER Handshaking Channels Over High-Speed Bit-Serial Bidirectional LVDS Links With Flow-Control and Clock-Correction on Commercial FPGAs for Scalable Neuromorphic Systems	IEEE TRANSACTIONS ON BIOMEDICAL CIRCUITS AND SYSTEMS
Ponencia	2017	Passive localization and detection of quadcopter UAVs by using Dynamic Vision Sensor	2017 5TH IRANIAN JOINT CONGRESS ON FUZZY AND INTELLIGENT SYSTEMS (CFIS)
Artículo	2016	An Address Event Representation-based Processing System for a Biped Robot	INTERNATIONAL JOURNAL OF ADVANCED ROBOTIC SYSTEMS
Artículo	2016	Fast Predictive Handshaking in Synchronous FPGAs for Fully Asynchronous Multisymbol Chip Links: Application to SpiNNaker 2-of-7 Links	IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS
Ponencia	2015	Fast Pipeline 128×128 pixel spiking convolution core for event-driven vision processing in FPGAs	Proceedings of 1st International Conference on Event-Based Control, Communication and Signal Processing, EBCCSP 2015
Ponencia	2015	High-speed serial interfaces for event-driven neuromorphic systems	Proceedings of 1st International Conference on Event-Based Control, Communication and Signal Processing, EBCCSP 2015
Revisión	2015	Plasticity in memristive devices for spiking neural networks	FRONTIERS IN NEUROSCIENCE
Artículo	2015	Poker-DVS and MNIST-DVS. Their history, how they were made, and other details	FRONTIERS IN NEUROSCIENCE
Ponencia	2014	An AER handshake-less modular infrastructure PCB with x8 2.5Gbps LVDS serial links	2014 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS)
Ponencia	2014	Live Demonstration: Event-Driven Sensing and Processing for High-Speed Robotic Vision	2014 IEEE BIOMEDICAL CIRCUITS AND SYSTEMS CONFERENCE (BIOCAS)
Artículo	2014	On the use of orientation filters for 3D reconstruction in event-driven stereo vision	FRONTIERS IN NEUROSCIENCE
Artículo	2014	Retinomorphic Event-Based Vision Sensors: Bioinspired Cameras With Spiking Output	PROCEEDINGS OF THE IEEE
Capítulo	2014	Spike-timing-dependent-plasticity in hybrid memristive-CMOS spiking neuromorphic systems	Memristors and Memristive Systems
Artículo	2013	A 1.5 ns OFF/ON Switching-Time Voltage-Mode LVDS Driver/Receiver Pair for Asynchronous AER Bit-Serial Chip Grid Links With Up to 40 Times Event-Rate Dependent Power Savings	IEEE TRANSACTIONS ON BIOMEDICAL CIRCUITS AND SYSTEMS
Artículo	2013	A 128 x 128 1.5% Contrast Sensitivity 0.9% FPN 3 mu s Latency 4 mW Asynchronous Frame-Free Dynamic Vision Sensor Using Transimpedance Preamplifiers	IEEE JOURNAL OF SOLID-STATE CIRCUITS
Artículo	2013	A Proposal for Hybrid Memristor-CMOS Spiking Neuromorphic Learning Systems	IEEE CIRCUITS AND SYSTEMS MAGAZINE
Ponencia	2013	Improved Contrast Sensitivity DVS and its Application to Event-Driven Stereo Vision	2013 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS)
Artículo	2013	Mapping from Frame-Driven to Frame-Free Event-Driven Vision Systems by Low-Rate Rate Coding and Coincidence Processing-Application to Feedforward ConvNets	IEEE TRANSACTIONS ON PATTERN ANALYSIS AND MACHINE INTELLIGENCE
Artículo	2013	Multicasting Mesh AER: A Scalable Assembly Approach for Reconfigurable Neuromorphic Structured AER Systems. Application to ConvNets	IEEE TRANSACTIONS ON BIOMEDICAL CIRCUITS AND SYSTEMS
Artículo	2013	STDP and sTDP variations with memristors for spiking neuromorphic learning systems	FRONTIERS IN NEUROSCIENCE
Artículo	2012	A ${0.35}~mu{ m m}$ Sub-ns Wake-up Time ON-OFF Switchable LVDS Driver-Receiver Chip I/O Pad Pair for Rate-Dependent Power Saving in AER Bit-Serial Links	IEEE TRANSACTIONS ON BIOMEDICAL CIRCUITS AND SYSTEMS
Artículo	2012	A memristive nanoparticle/organic hybrid synapstor for neuroinspired computing	ADVANCED FUNCTIONAL MATERIALS
Ponencia	2012	A real-time, event-driven neuromorphic system for goal-directed attentional selection	NEURAL INFORMATION PROCESSING, ICONIP 2012, PT II
Artículo	2012	An Event-Driven Multi-Kernel Convolution Processor Module for Event-Driven Vision Sensors	IEEE JOURNAL OF SOLID-STATE CIRCUITS
Artículo	2012	Comparison between frame-constrained fix-pixel-value and frame-free spiking-dynamic-pixel convNets for visual processing	FRONTIERS IN NEUROSCIENCE
Ponencia	2012	Design of adaptive nano/CMOS neural architectures	2012 19th IEEE International Conference on Electronics, Circuits and Systems (ICECS)
Artículo	2012	Efficient Feedforward Categorization of Objects and Human Postures with Address-Event Image Sensors	IEEE TRANSACTIONS ON PATTERN ANALYSIS AND MACHINE INTELLIGENCE
Artículo	2011	A 3.6 mu s Latency Asynchronous Frame-Free Event-Driven Dynamic-Vision-Sensor	IEEE JOURNAL OF SOLID-STATE CIRCUITS
Artículo	2011	A 32 x 32 Pixel Convolution Processor Chip for Address Event Vision Sensors With 155 ns Event Latency and 20 Meps Throughput	IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS
Artículo	2011	An Instant-Startup Jitter-Tolerant Manchester-Encoding Serializer/Deserializer Scheme for Event-Driven Bit-Serial LVDS Interchip AER Links	IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS
Revisión	2011	Neuromorphic silicon neuron circuits	FRONTIERS IN NEUROSCIENCE
Artículo	2011	On spike-timing-dependent-plasticity, memristive devices, and building a self-learning visual cortex	FRONTIERS IN NEUROSCIENCE
Ponencia	2011	Performance study of software AER-based convolutions on a parallel supercomputer	ADVANCES IN COMPUTATIONAL INTELLIGENCE, IWANN 2011, PT I
Ponencia	2010	A 100dB dynamic range event-driven spatial contrast sensor with 100μs response time and time-to-first-spike mode	ESSCIRC 2010 - 36th European Solid State Circuits Conference
Artículo	2010	A Five-Decade Dynamic-Range Ambient-Light-Independent Calibrated Signed-Spatial-Contrast AER Retina With 0.1-ms Latency and Optional Time-to-First-Spike Mode	IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS
Artículo	2010	Fast Vision Through Frameless Event-Based Sensing and Convolutional Processing: Application to Texture Recognition	IEEE TRANSACTIONS ON NEURAL NETWORKS
Ponencia	2010	Neocortical Frame-free Vision Sensing and Processing through Scalable Spiking ConvNet Hardware	2010 INTERNATIONAL JOINT CONFERENCE ON NEURAL NETWORKS IJCNN 2010
Ponencia	2010	On Neuromorphic Spiking Architectures for Asynchronous STDP Memristive Systems	2010 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS
Ponencia	2010	On Scalable Spiking ConvNet Hardware for Cortex-Like Visual Sensory Processing Systems	2010 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS
Ponencia	2010	Spike-based convolutional network for real-time processing	2010 20th International Conference on Pattern Recognition
Ponencia	2009	A Mismatch Calibrated Bipolar Spatial Contrast AER Retina with Adjustable Contrast Threshold	ISCAS: 2009 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOLS 1-5
Artículo	2009	A weak-to-strong inversion mismatch model for analog circuit design	ANALOG INTEGRATED CIRCUITS AND SIGNAL PROCESSING
Ponencia	2009	Advanced Vision Processing Systems: Spike-Based Simulation and Processing	ADVANCED CONCEPTS FOR INTELLIGENT VISION SYSTEMS, PROCEEDINGS
Artículo	2009	CAVIAR: a 45k neuron, 5M synapse, 12G connects/s AER hardware sensory-processing-learning-actuating system for high-speed visual object recognition and tracking	IEEE TRANSACTIONS ON NEURAL NETWORKS
Ponencia	2009	OTA-C oscillator with low frequency variations for on-chip clock generation in serial LVDS-AER links	ISCAS: 2009 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOLS 1-5
Artículo	2008	A calibration technique for very low current and compact tunable neuromorphic cells: Application to 5-bit 20-nA DACs	IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS
Ponencia	2008	Compact calibration circuit for large neuromorphic arrays	PROCEEDINGS OF 2008 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOLS 1-10
Ponencia	2008	Event based vision sensing and processing	2008 15TH IEEE INTERNATIONAL CONFERENCE ON IMAGE PROCESSING, VOLS 1-5
Ponencia	2008	Fully digital AER convolution chip for vision processing	PROCEEDINGS OF 2008 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOLS 1-10
Ponencia	2008	High-speed character recognition system based on a complex hierarchical AER architecture	PROCEEDINGS OF 2008 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOLS 1-10
Ponencia	2008	LVDS interface for AER links with burst mode operation capability	PROCEEDINGS OF 2008 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOLS 1-10
Artículo	2008	On real-time AER 2-D convolutions hardware for neuromorphic spike-based cortical processing	IEEE TRANSACTIONS ON NEURAL NETWORKS
Ponencia	2007	A physical interpretation of the distance term in pelgrom's mismatch model results in very efficient CAD	Proceedings - IEEE International Symposium on Circuits and Systems
Artículo	2007	A SPATIAL CONTRAST RETINA WITH ON-CHIP CALIBRATION FOR NEUROMORPHIC SPIKE-BASED AER VISION SYSTEMS	IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-FUNDAMENTAL THEORY AND APPLICATIONS
Artículo	2007	Inter-spike-intervals analysis of AER Poisson-like generator hardware	NEUROCOMPUTING
Artículo	2007	On an Efficient CAD Implementation of the Distance Term in Pelgrom's Mismatch Model	IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS
Artículo	2007	The stochastic i-pot: A circuit block for programming bias currents	IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-ANALOG AND DIGITAL SIGNAL PROCESSING
Ponencia	2006	A bio-inspired event-based real-time image processor	Proceedings of the First IEEE/RAS-EMBS International Conference on Biomedical Robotics and Biomechatronics, 2006, BioRob 2006
Artículo	2006	A low-power current mode fuzzy-ART cell	IEEE TRANSACTIONS ON NEURAL NETWORKS
Artículo	2006	A neuromorphic cortical-layer microchip for spike-based event processing vision systems	IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS
Ponencia	2006	An arbitrary kernel convolution AER- transceiver chip for real-time image filtering	2006 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOLS 1-11, PROCEEDINGS
Ponencia	2006	High-speed image processing with AER-based components	2006 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOLS 1-11, PROCEEDINGS
Artículo	2006	On algorithmic rate-coded AER generation	IEEE TRANSACTIONS ON NEURAL NETWORKS
Ponencia	2005	A calibration scheme for subthreshold current mode circuits	BIOENGINEERED AND BIOINSPIRED SYSTEMS II
Ponencia	2005	A digital pixel cell for address event representation image convolution processing	BIOENGINEERED AND BIOINSPIRED SYSTEMS II
Ponencia	2005	A mismatch characterization and simulation environment for weak-to-strong inversion CMOS transistors	VLSI CIRCUITS AND SYSTEMS II, PTS 1 AND 2
Ponencia	2005	AER building blocks for multi-layer multi-chip neuromorphic vision systems	Advances in Neural Information Processing Systems
Ponencia	2005	AER synthetic generation in hardware for bio-inspired spiking systems	BIOENGINEERED AND BIOINSPIRED SYSTEMS II
Artículo	2005	Inter-spike-intervals analysis of Poisson like hardware synthetic AER generation	COMPUTATIONAL INTELLIGENCE AND BIOINSPIRED SYSTEMS, PROCEEDINGS
Ponencia	2005	On event generators for Address Event Representation transmitters	BIOENGINEERED AND BIOINSPIRED SYSTEMS II
Ponencia	2004	A new charge-packet driven mismatch-calibrated integrate-and-fire neuron for processing positive and negative signals in AER based systems	2004 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, PROCEEDINGS
Artículo	2004	A precise 90 degrees quadrature OTA-C oscillator tunable in the 50-130-MHz range	IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS
Ponencia	2004	A precise 90 degrees quadrature OTA-C VCO between 50-130 MHz	2004 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, PROCEEDINGS
Ponencia	2004	A precise CMOS mismatch model for analog design from weak to strong inversion	2004 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, PROCEEDINGS
Artículo	2004	Current mode techniques for sub-pico-ampere circuit design	ANALOG INTEGRATED CIRCUITS AND SIGNAL PROCESSING
Ponencia	2004	Hardware implementation of complex reaction-diffusion neural networks using log-domain techniques	2004 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, PROCEEDINGS
Ponencia	2004	On leakage current temperature characterization using sub-pico-ampere circuit techniques	2004 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, PROCEEDINGS
Ponencia	2004	On mismatch properties of MOS and resistors calibrated ladder structures	2004 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, PROCEEDINGS
Ponencia	2004	On synthetic AER generation	2004 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, PROCEEDINGS
Ponencia	2003	CMOS transistor mismatch model valid from weak to strong inversion	ESSCIRC 2003: PROCEEDINGS OF THE 29TH EUROPEAN SOLID-STATE CIRCUITS CONFERENCE
Artículo	2003	Compact low-power calibration mini-DACs for neural arrays with programmable weights	IEEE TRANSACTIONS ON NEURAL NETWORKS
Artículo	2003	Log-domain implementation of complex dynamics reaction-diffusion neural networks	IEEE TRANSACTIONS ON NEURAL NETWORKS
Ponencia	2003	MOSFET mismatch in weak/moderate inversion: model needs and implications for analog design.	ESSCIRC 2003: PROCEEDINGS OF THE 29TH EUROPEAN SOLID-STATE CIRCUITS CONFERENCE
Artículo	2003	On the design and characterization of femtoampere current-mode circuits	IEEE JOURNAL OF SOLID-STATE CIRCUITS
Artículo	2003	Precise 90 degrees quadrature current-controlled oscillator tunable between 50-130 MHz	ELECTRONICS LETTERS
Ponencia	2002	A loss control feedback loop for VCO stable amplitude tuning of RF integrated filters	2002 IEEE International Symposium on Circuits and Systems (ISCAS)
Artículo	2002	Current-mode fully-programmable piece-wise-linear block for neuro-fuzzy applications	ELECTRONICS LETTERS
Ponencia	2002	Reliable handling of fempto-ampere currents in standard CMOS	European Solid-State Circuits Conference
Artículo	2002	Synthetic generation of events for address-event-representation communications	Lecture Notes in Computer Science
Ponencia	2000	A methodology for MOS transistor mismatch parameter extraction and mismatch simulation	ISCAS 2000: IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS - PROCEEDINGS, VOL IV
Artículo	2000	A new five-parameter MOS transistor mismatch model	IEEE ELECTRON DEVICE LETTERS
Ponencia	2000	A new strong inversion 5-parameter transistor mismatch model	ISCAS 2000: IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS - PROCEEDINGS, VOL IV
Artículo	2000	A programmable VLSI filter architecture for application in real-time vision processing systems.	International Journal of Neural Systems
Ponencia	2000	Methodology for MOS transistor mismatch parameter extraction and mismatch simulation	Proceedings - IEEE International Symposium on Circuits and Systems
Ponencia	2000	New strong inversion 5-parameter transistor mismatch model	Proceedings - IEEE International Symposium on Circuits and Systems
Ponencia	2000	Programmable kernel analog VLSI convolution chip for real time vision processing	IJCNN 2000: PROCEEDINGS OF THE IEEE-INNS-ENNS INTERNATIONAL JOINT CONFERENCE ON NEURAL NETWORKS, VOL IV
Ponencia	1999	A 2D image filtering architecture for real-time vision processing systems	PROCEEDINGS OF THE SEVENTH INTERNATIONAL CONFERENCE ON MICROELECTRONICS FOR NEURAL, FUZZY AND BIO-INSPIRED SYSTEMS, MICORNEURO'99
Ponencia	1999	A 5-parameter mismatch model for short channel MOS transistors	European Solid-State Circuits Conference
Ponencia	1999	A general subthreshold MOS Translinear theorem	ISCAS '99: PROCEEDINGS OF THE 1999 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOL 2
Artículo	1999	A general translinear principle for subthreshold MOS transistors	IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-FUNDAMENTAL THEORY AND APPLICATIONS
Artículo	1999	Adaptive resonance theory microchips	FOUNDATIONS AND TOOLS FOR NEURAL MODELING, PROCEEDINGS, VOL I
Artículo	1999	AER image filtering architecture for vision-processing systems	IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-FUNDAMENTAL THEORY AND APPLICATIONS
Artículo	1999	Bipolar/CMOS current-source flip-flop for application in neuro-fuzzy systems	ELECTRONICS LETTERS
Artículo	1999	General subthreshold MOS translinear theorem	Proceedings - IEEE International Symposium on Circuits and Systems
Ponencia	1999	Programmable 2D image filter for AER vision processing	ISCAS '99: PROCEEDINGS OF THE 1999 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOL 4
Artículo	1999	Systematic width-and-length dependent CMOS transistor mismatch characterization and simulation	ANALOG INTEGRATED CIRCUITS AND SIGNAL PROCESSING
Artículo	1999	Very wide range tunable CMOS/bipolar current mirrors with voltage clamped input	IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-FUNDAMENTAL THEORY AND APPLICATIONS
Artículo	1998	7-decade tuning range CMOS OTA-C sinusoidal VCO	ELECTRONICS LETTERS
Artículo	1998	A high-precision current-mode WTA-MAX circuit with multichip capability	IEEE JOURNAL OF SOLID-STATE CIRCUITS
Ponencia	1998	MOS/bipolar active input current mirrors with 13-decades gain adjustment range	European Solid-State Circuits Conference
Ponencia	1998	Voltage clamping current mirrors with 13-decades gain adjustment range suitable for low power MOS/bipolar current mode signal processing circuits	Proceedings - IEEE International Symposium on Circuits and Systems
Ponencia	1997	A 'do-it-yourself' methodology for CMOS transistor mismatch characterization	40TH MIDWEST SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOLS 1 AND 2
Artículo	1997	An ART1 microchip and its use in multi-ART1 systems	IEEE TRANSACTIONS ON NEURAL NETWORKS
Ponencia	1997	ART1 microchip and its use in multi-ART1 systems	Proceedings - IEEE International Symposium on Circuits and Systems
Artículo	1996	A modified ART 1 algorithm more suitable for VLSI implementations	NEURAL NETWORKS
Artículo	1996	A real-time clustering microchip neural engine	IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS
Letter	1995	A MODULAR CURRENT-MODE HIGH-PRECISION WINNER-TAKE-ALL CIRCUIT	IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS
Ponencia	1995	Experimental results of an analog current-mode ART1 chip	1995 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOLS 1-3
Ponencia	1994	A CMOS VLSI analog current-mode high-speed ART1 chip	1994 IEEE INTERNATIONAL CONFERENCE ON NEURAL NETWORKS, VOL 1-7
Ponencia	1994	A modular current-mode high-precision winner-take-all circuit	1994 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOL 5
Ponencia	1994	Basic building block approach to CMOS design of analog neuro/fuzzy systems	IEEE International Conference on Fuzzy Systems
Artículo	1994	Circuitos CMOS para adaptación de funciones de pertenencia en chpis "Neuro-Fuzzy"	Actas del IX Congreso de Diseño de Circuitos Integrados, 9, 10 y 11 de noviembre de 1994, Maspalomas, Gran Canaria
Ponencia	1994	Circuits and algorithms for adaptive neuro-fuzzy analog chips	Proceedings of the 4th International Conference on Microelectronics for Neural Networks and Fuzzy Systems, ICMNN 1994
Ponencia	1994	CMOS VLSI analog current-mode high-speed ART1 chip	IEEE International Conference on Neural Networks - Conference Proceedings
Ponencia	1994	Modular current-mode high-precision winner-take-all circuit	Proceedings - IEEE International Symposium on Circuits and Systems
Artículo	1994	Normalización de señales multidimensionales usando circuitos CMOS en modo de corriente	Actas del IX Congreso de Diseño de Circuitos Integrados, 9, 10 y 11 de noviembre de 1994, Maspalomas, Gran Canaria
Letter	1994	THE ACTIVE-INPUT REGULATED-CASCODE CURRENT MIRROR	IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS
Artículo	1993	A cmos analog adaptive bam with on-chip learning and weight refreshing	IEEE TRANSACTIONS ON NEURAL NETWORKS
Ponencia	1993	Model for VLSI implementation of CNN image processing chips using current-mode techniques	Proceedings - IEEE International Symposium on Circuits and Systems
Ponencia	1992	CMOS analog neural network systems based on oscillatory neurons	Proceedings - IEEE International Symposium on Circuits and Systems
Artículo	1992	Generation, design and tuning of ota-c high-frequency sinusoidal oscillators	IEE PROCEEDINGS-G CIRCUITS DEVICES AND SYSTEMS
Ponencia	1992	Modular analog continuous-time VLSI neural networks with on chip hebbian learning and analog storage	Proceedings - IEEE International Symposium on Circuits and Systems
Artículo	1991	A Cmos Implementation Of Fitzhugh-Nagumo Neuron Model	IEEE JOURNAL OF SOLID-STATE CIRCUITS
Ponencia	1991	CMOS continuous BAM with on chip learning	Lecture Notes in Computer Science
Nota	1991	CMOS OTA-C High-Frequency Sinusoidal Oscillators	IEEE JOURNAL OF SOLID-STATE CIRCUITS
Ponencia	1991	Frequency tuning loop for VCOs	Proceedings - IEEE International Symposium on Circuits and Systems
Ponencia	1991	Hysteresis based neural oscillators for VLSI implementations	Proceedings - IEEE International Symposium on Circuits and Systems
Ponencia	1991	VLSI implementation of a transconductance mode continuous BAM with on chip learning and dynamic analog memory	Proceedings - IEEE International Symposium on Circuits and Systems
Ponencia	1990	Analog neural networks for real time constrained optimization	1990 IEEE INTERNATIONAL SYMP ON CIRCUITS AND SYSTEMS, VOLS 1-4
Ponencia	1990	CMOS circuit implementations for neuron models	Proceedings - IEEE International Symposium on Circuits and Systems
Artículo	1990	On the design of voltage-controlled sinusoidal oscillators using otas	IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS
Ponencia	1990	Very high frequency CMOS OTA-C quadrature oscillators	Proceedings - IEEE International Symposium on Circuits and Systems
Artículo	1989	10-MHZ CMOS OTA-C VOLTAGE-CONTROLLED QUADRATURE OSCILLATOR	ELECTRONICS LETTERS
Ponencia	1989	A NOVEL CMOS ANALOG NEURAL OSCILLATOR CELL	1989 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOLS 1-3
Artículo	1989	A programmable neural oscillator cell	IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS
Ponencia	1989	NONLINEAR TIME-DOMAIN MACROMODELING OF OTA CIRCUITS	1989 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOLS 1-3
Ponencia	1989	Novel CMOS analog neural oscillator cell	Proceedings - IEEE International Symposium on Circuits and Systems
Artículo	1989	Operational Transconductance Amplifier-Based Nonlinear function Syntheses	IEEE JOURNAL OF SOLID-STATE CIRCUITS
Ponencia	1989	OTA-based non-linear function approximations	Proceedings - IEEE International Symposium on Circuits and Systems
Ponencia	1989	OTA-BASED NONLINEAR FUNCTION APPROXIMATIONS	1989 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOLS 1-3
Ponencia	1989	Programmable piece-wise linear function synthesizers using operational transconductance amplifiers	IEE Conference Publication
Ponencia	1988	Generation and design of sinusoidal oscillators using OTAS	Proceedings - IEEE International Symposium on Circuits and Systems

Tesis dirigidas/tutorizadas:10

Fecha lectura	Título	Rol
07/03/2025	Hardware Demonstrators of Oscillatory Neural Networks: A Versatile Approach to Brain-Inspired Computing, from Embedded Systems to Phase-Transition Materials	Tutor/a
25/10/2024	Developing digital and analog spiking neural Networks for interacting with biological Tissues in the Case Study of temporal lobe Epilepsy	Director/a
19/02/2021	MEMRISTOR BASED EVENT DRIVEN NEUROMORPHIC NANO-CMOS PROCESSOR	Director/a
04/04/2018	DISEÑO DIGITAL PARA SISTEMAS BIO-INSPIRADOS NEUROMÓRFICOS DE PROCESO DE VISIÓN (DIGITAL DESING FOR NEUROPORPHIC BIO-INSPIRED VISION PROCESSING	Director/a
19/12/2011	IMPLEMENTACIÓN DE SISTEMAS NEUROMÓRFICOS MODULARES ESCALABLES	Director/a
11/03/2011	HERRAMIENTA DE SIMULACIÓN PARA CONSTRUIR Y ANALIZAR SISTEMAS COMPLEJOS Y JERÁRQUICAMENTE ESTRUCTURADOS BASADOS EN AER QUE IMPLEMENTAN PROCESADO DE LA INFORMACIÓN VISUAL	Director/a
21/05/2010	MICROCHIPS CONVOLUCIONADORES AER PARA PROCESADO ASÍNCRONO NEOCORTICAL DE INFORMACIÓN SENSORIAL VISUAL CODIFICADA EN EVENTOS	Director/a
20/05/2010	ESTUDIO, DISEÑO, IMPLEMENTACIÓN Y TEST DE RETINAS VISUALES VLSI SENSORAS DE CONTRASTE ESPACIAL Y TEMPORAL	Director/a
20/11/2007	ARQUITECTURA BIO-INSPIRADA BASADA EN AER PARA LA CONVOLUCIÓN DE IMÁGENES EN TIEMPO REAL	Director/a
18/06/2003	ESTUDIO Y EVALUACIÓN DE INTERFACES PARA LA CONEXIÓN DE SISTEMAS NEUROMÓRFICOS MEDIANTE ADDRESS-EVENT-REPRESENTATIÓN	Director/a

Proyectos de Investigación: 3

Infraestructura: 1

Sobre los datos de Financiación (proyectos de investigación, contratos, ayudas, etc.):

Actualizamos cada lunes este apartado, según la información proporcionada por Sisius, que por el momento, no incluye ayudas del Plan Propio ni proyectos externos.
Procedimiento para solicitar la participación en proyectos externos y/o para incluir la referencia en Sisius

Fecha de la última carga desde SISIUS: 14/06/2025
Para más información sobre la Financiación incluida en PRISMA, escríbanos al correo bibliometria@us.es

Proyectos de Investigación

Fecha de inicio	Fecha de fin	Rol	Denominación	Agencia financiadora
01/01/2020	30/06/2023	Investigador/a	Two-Dimensional Oscillatory Neural Networks for Energy Efficent Neuromorphic computing (NeurONN) (H2020-871501)	Comisión Europea (Europeo)
01/02/2020	31/01/2022	Investigador/a	Neuro-Radio: Radio cognitiva embebida con aprendizaje neuronal (US-1260118)	Junta de Andalucía (Consejería de Economía y Conocimiento) (Autonómico)
12/09/2024	30/06/2026	Investigador/a	USECHIP: Cátedra en Microelectrónica de la Universidad de Sevilla (TSI-069100-2023-001)	Ministerio de Asuntos Económicos y Transformación Digital (Nacional)

Infraestructura

Fecha de inicio	Fecha de fin	Rol	Denominación	Agencia financiadora
01/06/2018	14/02/2022	Responsable	Creación de un Laboratorio de Ciberseguridad Hardware en el Instituto de Microelectrónica de Sevilla (IE17_5735_USE)	Junta de Andalucía - Consejería de Economía, Conocimiento, Empresas y Universidad (Autonómico)

El investigador no tiene ningún resultado de investigación asociado

Bernabe Linares Barranco

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Bernabe Linares Barranco

Investiga en

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