| Artículo | 2024 |
A Comprehensive Approach to Improving the Thermal Reliability of RTN-Based PUFs
|
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS |
| Editorial | 2024 |
Guest editorial special issue on selected papers from SMACD 2023
|
AEU-INTERNATIONAL JOURNAL OF ELECTRONICS AND COMMUNICATIONS |
| Ponencia | 2024 |
Harvesting RTN for True Random Number Generators and Physical Unclonable Functions
|
Proceedings - 2024 20th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design, SMACD 2024 |
| Ponencia | 2024 |
Optimization-based bit selection technique to improve the reliability of PUFs
|
Proceedings - 2024 20th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design, SMACD 2024 |
| Artículo | 2024 |
Reliability improvement of SRAM PUFs based on a detailed experimental study into the stochastic effects of aging
|
AEU-INTERNATIONAL JOURNAL OF ELECTRONICS AND COMMUNICATIONS |
| Ponencia | 2024 |
Streamlined design methodology for Cell-Based DCOs
|
Proceedings - 2024 20th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design, SMACD 2024 |
| Ponencia | 2024 |
Towards a Digital Twin of a Time-Dependent Variability Characterization Laboratory
|
Proceedings - 2024 20th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design, SMACD 2024 |
| Ponencia | 2023 |
A detailed, cell-by-cell look into the effects of aging on an SRAM PUF using a specialized test array
|
Proceedings - 2023 19th International Conference on Synthesis, Modeling, Analysis and Simulation Methods, and Applications to Circuit Design, SMACD 2023 |
| Ponencia | 2023 |
A Peak Detect & Hold circuit to measure and exploit RTN in a 65-nm CMOS PUF
|
Proceedings - 2023 19th International Conference on Synthesis, Modeling, Analysis and Simulation Methods, and Applications to Circuit Design, SMACD 2023 |
| Ponencia | 2023 |
A Test Module for Aging Characterization of Digital Circuits
|
Proceedings - 2023 19th International Conference on Synthesis, Modeling, Analysis and Simulation Methods, and Applications to Circuit Design, SMACD 2023 |
| Ponencia | 2023 |
Challenges and solutions to the defect-centric modeling and circuit simulation of time-dependent variability
|
IEEE International Reliability Physics Symposium Proceedings |
| Ponencia | 2023 |
Design considerations for a CMOS 65-nm RTN-based PUF
|
Proceedings - 2023 19th International Conference on Synthesis, Modeling, Analysis and Simulation Methods, and Applications to Circuit Design, SMACD 2023 |
| Artículo | 2023 |
PACOSYT: A Passive Component Synthesis Tool Based on Machine Learning and Tailored Modeling Strategies Towards Optimal RF and mm-Wave Circuit Designs
|
IEEE Journal of Microwaves |
| Ponencia | 2023 |
Reliability evaluation of IC Ring Oscillator PUFs
|
Proceedings - 2023 19th International Conference on Synthesis, Modeling, Analysis and Simulation Methods, and Applications to Circuit Design, SMACD 2023 |
| Ponencia | 2023 |
Strategies for parameter extraction of the time constant distribution of time-dependent variability models for nanometer-scale devices
|
Proceedings - 2023 19th International Conference on Synthesis, Modeling, Analysis and Simulation Methods, and Applications to Circuit Design, SMACD 2023 |
| Artículo | 2022 |
A DRV-based bit selection method for SRAM PUF key generation and its impact on ECCs
|
INTEGRATION-THE VLSI JOURNAL |
| Ponencia | 2022 |
A novel physical unclonable function using RTN
|
Proceedings - IEEE International Symposium on Circuits and Systems |
| Ponencia | 2022 |
A smart SRAM-cell array for the experimental study of variability phenomena in CMOS technologies
|
IEEE International Reliability Physics Symposium Proceedings |
| Ponencia | 2022 |
A systematic approach to RTN parameter fitting based on the Maximum Current Fluctuation
|
Proceedings - 2022 18th International Conference on Synthesis, Modeling, Analysis and Simulation Methods, and Applications to Circuit Design, SMACD 2022 |
| Artículo | 2022 |
Addressing a new class of multi-objective passive device optimization for radiofrequency circuit design
|
ELECTRONICS |
| Ponencia | 2022 |
Characterization and analysis of BTI and HCI effects in CMOS current mirrors
|
Proceedings - 2022 18th International Conference on Synthesis, Modeling, Analysis and Simulation Methods, and Applications to Circuit Design, SMACD 2022 |
| Ponencia | 2022 |
Characterizing Aging Degradation of Integrated Circuits with a Versatile Custom Array of Reliability Test Structures
|
IEEE International Conference on Microelectronic Test Structures |
| Artículo | 2022 |
Determination of the time constant distribution of a defect-centric time-dependent variability model for Sub-100-nm FETs
|
IEEE TRANSACTIONS ON ELECTRON DEVICES |
| Ponencia | 2022 |
High-level design of a novel PUF based on RTN
|
Proceedings - 2022 18th International Conference on Synthesis, Modeling, Analysis and Simulation Methods, and Applications to Circuit Design, SMACD 2022 |
| Ponencia | 2022 |
Impact of BTI and HCI on the reliability of a Majority Voter
|
Proceedings - 2022 18th International Conference on Synthesis, Modeling, Analysis and Simulation Methods, and Applications to Circuit Design, SMACD 2022 |
| Ponencia | 2022 |
Machine learning approaches for transformer modeling
|
Proceedings - 2022 18th International Conference on Synthesis, Modeling, Analysis and Simulation Methods, and Applications to Circuit Design, SMACD 2022 |
| Artículo | 2022 |
On the Impact of the Biasing History on the Characterization of Random Telegraph Noise
|
IEEE TRANSACTIONS ON INSTRUMENTATION AND MEASUREMENT |
| Ponencia | 2022 |
On the use of an RTN simulator to explore the quality trade-offs of a novel RTN-based PUF
|
Proceedings - 2022 18th International Conference on Synthesis, Modeling, Analysis and Simulation Methods, and Applications to Circuit Design, SMACD 2022 |
| Ponencia | 2021 |
A study of SRAM PUFs reliability using the static noise margin
|
SMACD / PRIME 2021 - International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design and 16th Conference on PhD Research in Microelectronics and Electronics |
| Artículo | 2021 |
An efficient transformer modeling approach for mm-wave circuit design
|
AEU-INTERNATIONAL JOURNAL OF ELECTRONICS AND COMMUNICATIONS |
| Ponencia | 2021 |
Circuit reliability prediction: challenges and solutions for the device time-dependent variability characterization roadblock
|
LAEDC 2021 - IEEE Latin America Electron Devices Conference |
| Ponencia | 2021 |
Dealing with hierarchical partitioning in bottom-up design methodologies
|
SMACD / PRIME 2021 - International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design and 16th Conference on PhD Research in Microelectronics and Electronics |
| Artículo | 2021 |
Hierarchical yield-aware synthesis methodology covering device-, circuit-, and system-level for radiofrequency ICs
|
IEEE ACCESS |
| Artículo | 2021 |
Improving the reliability of SRAM-based PUFs under varying operation conditions and aging degradation
|
MICROELECTRONICS RELIABILITY |
| Ponencia | 2021 |
Simulating the impact of random telegraph noise on integrated circuits
|
SMACD / PRIME 2021 - International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design and 16th Conference on PhD Research in Microelectronics and Electronics |
| Artículo | 2021 |
Statistical characterization of time-dependent variability defects using the maximum current fluctuation
|
IEEE TRANSACTIONS ON ELECTRON DEVICES |
| Artículo | 2021 |
Statistical threshold voltage shifts caused by BTI and HCI at nominal and accelerated conditions
|
SOLID-STATE ELECTRONICS |
| Artículo | 2021 |
Unified RTN and BTI statistical compact modeling from a defect-centric perspective
|
SOLID-STATE ELECTRONICS |
| Artículo | 2020 |
A Multilevel Bottom-Up Optimization Methodology for the Automated Synthesis of RF Systems
|
IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS |
| Artículo | 2020 |
A robust and automated methodology for the analysis of Time-Dependent Variability at transistor level
|
INTEGRATION-THE VLSI JOURNAL |
| Artículo | 2020 |
Chaotic image encryption using hopfield and hindmarsh–rose neurons implemented on FPGA
|
SENSORS |
| Artículo | 2020 |
Flexible Setup for the Measurement of CMOS Time-Dependent Variability with Array-Based Integrated Circuits
|
IEEE TRANSACTIONS ON INSTRUMENTATION AND MEASUREMENT |
| Ponencia | 2020 |
Improving the reliability of SRAM-based PUFs in the presence of aging
|
Proceedings - 2020 15th IEEE International Conference on Design and Technology of Integrated Systems in Nanoscale Era, DTIS 2020 |
| Capítulo | 2020 |
Modeling of variability and reliability in analog circuits
|
Modelling methodologies in analogue integrated circuit design |
| Capítulo | 2020 |
On the usage of machine-learning techniques for the accurate modeling of integrated inductors for RF applications
|
Modelling methodologies in analogue integrated circuit design |
| Artículo | 2020 |
Ready-to-fabricate RF circuit synthesis using a layout- And variability-aware optimization-based methodology
|
IEEE ACCESS |
| Artículo | 2020 |
Synthesis of mm-Wave Wideband Receivers in 28nm CMOS Technology for Automotive Radar Applications
|
IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS |
| Artículo | 2020 |
Yield-aware multi-objective optimization of a MEMS accelerometer system using QMC-based methodologies
|
MICROELECTRONICS JOURNAL |
| Artículo | 2019 |
A detailed study of the gate/drain voltage dependence of RTN in bulk pMOS transistors
|
MICROELECTRONIC ENGINEERING |
| Ponencia | 2019 |
A New Time Efficient Methodology for the Massive Characterization of RTN in CMOS Devices
|
2019 IEEE INTERNATIONAL RELIABILITY PHYSICS SYMPOSIUM (IRPS) |
| Artículo | 2019 |
A smart noise- and RTN-removal method for parameter extraction of CMOS aging compact models
|
SOLID-STATE ELECTRONICS |
| Artículo | 2019 |
A two-step surrogate modeling strategy for single-objective and multi-objective optimization of radiofrequency circuits
|
SOFT COMPUTING |
| Artículo | 2019 |
A Versatile CMOS Transistor Array IC for the Statistical Characterization of Time-Zero Variability, RTN, BTI, and HCI
|
IEEE JOURNAL OF SOLID-STATE CIRCUITS |
| Ponencia | 2019 |
An IC array for the statistical characterization of time-dependent variability of basic circuit blocks
|
SMACD 2019 - 16th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design, Proceedings |
| Ponencia | 2019 |
Experimental characterization of time-dependent variability in ring oscillators
|
SMACD 2019 - 16th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design, Proceedings |
| Ponencia | 2019 |
Generation of Lifetime-Aware Pareto-Optimal Fronts Using a Stochastic Reliability Simulator
|
Design Automation and Test in Europe Conference and Exhibition |
| Ponencia | 2019 |
New method for the automated massive characterization of Bias Temperature Instability in CMOS transistors
|
Design Automation and Test in Europe Conference and Exhibition |
| Artículo | 2019 |
Optimization and CMOS design of chaotic oscillators robust to PVT variations: INVITED
|
INTEGRATION-THE VLSI JOURNAL |
| Ponencia | 2019 |
Synthesis of mm-Wave circuits using-EM-simulated passive structure libraries
|
SMACD 2019 - 16th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design, Proceedings |
| Ponencia | 2019 |
TiDeVa: A Toolbox for the Automated and Robust Analysis of Time-Dependent Variability at Transistor Level
|
SMACD 2019 - 16th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design, Proceedings |
| Artículo | 2019 |
Two-Step RF IC Block Synthesis with Pre-Optimized Inductors and Full Layout Generation In-the-loop
|
IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS |
| Artículo | 2018 |
A Comparison of Automated RF Circuit Design Methodologies: Online Versus Offline Passive Component Design
|
IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS |
| Ponencia | 2018 |
A Model Parameter Extraction Methodology Including Time-Dependent Variability for Circuit Reliability Simulation
|
SMACD 2018 - 15th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design |
| Ponencia | 2018 |
A noise and RTN-removal smart method for parameters extraction of CMOS aging compact models
|
2018 Joint International EUROSOI Workshop and International Conference on Ultimate Integration on Silicon, EUROSOI-ULIS 2018 |
| Artículo | 2018 |
A novel design methodology for the mixed-domain optimization of a MEMS accelerometer
|
INTEGRATION-THE VLSI JOURNAL |
| Ponencia | 2018 |
Analysis of Body Bias and RTN-induced Frequency Shift of Low Voltage Ring Oscillators in FDSOI Technology
|
2018 28TH INTERNATIONAL SYMPOSIUM ON POWER AND TIMING MODELING, OPTIMIZATION AND SIMULATION (PATMOS) |
| Ponencia | 2018 |
Automated Massive RTN Characterization Using a Transistor Array Chip
|
SMACD 2018 - 15th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design |
| Ponencia | 2018 |
CMOS Characterization and Compact Modelling for Circuit Reliability Simulation
|
2018 IEEE 24th International Symposium on On-Line Testing and Robust System Design, IOLTS 2018 |
| Ponencia | 2018 |
Design considerations of an SRAM array for the statistical validation of time-dependent variability models
|
SMACD 2018 - 15th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design |
| Artículo | 2018 |
Enhanced systematic design of a voltage controlled oscillator using a two-step optimization methodology
|
INTEGRATION-THE VLSI JOURNAL |
| Editorial | 2018 |
Guest Editorial Special Issue on Selected Papers from PRIME 2017 and SMACD 2017
|
INTEGRATION-THE VLSI JOURNAL |
| Ponencia | 2018 |
Handling the Effects of Variability and Layout Parasitics in the Automatic Synthesis of LNAs
|
SMACD 2018 - 15th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design |
| Ponencia | 2018 |
Lifetime Calculation Using a Stochastic Reliability Simulator for Analog ICs
|
SMACD 2018 - 15th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design |
| Artículo | 2018 |
PVT-Robust CMOS Programmable Chaotic Oscillator: Synchronization of Two 7-Scroll Attractors
|
ELECTRONICS |
| Artículo | 2018 |
Quasi-static PEEC planar solver using a weighted combination of 2D and 3D analytical Green's functions and a predictive meshing generator
|
INTEGRATION-THE VLSI JOURNAL |
| Ponencia | 2018 |
Weighted time lag plot defect parameter extraction and GPU-based BTI modeling for BTI variability
|
2018 IEEE INTERNATIONAL RELIABILITY PHYSICS SYMPOSIUM (IRPS) |
| Ponencia | 2017 |
A size-adaptive time-step algorithm for accurate simulation of aging in analog ICs
|
2017 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS) |
| Ponencia | 2017 |
A strategy to efficiently include electromagnetic simulations in optimization-based RF circuit design methodologies
|
2017 IEEE MTT-S INTERNATIONAL CONFERENCE ON NUMERICAL ELECTROMAGNETIC AND MULTIPHYSICS MODELING AND OPTIMIZATION FOR RF, MICROWAVE, AND TERAHERTZ APPLICATIONS (NEMO) |
| Ponencia | 2017 |
A transistor array chip for the statistical characterization of process variability, RTN and BTI/CHC aging
|
International Conference on Synthesis Modeling Analysis and Simulation Methods and Applications to Circuit Design |
| Ponencia | 2017 |
An algorithm for a class of real-life multi-objective optimization problems with a sweeping objective
|
2017 IEEE CONGRESS ON EVOLUTIONARY COMPUTATION (CEC) |
| Artículo | 2017 |
An Automated Design Methodology of RF Circuits by Using Pareto-Optimal Fronts of EM-Simulated Inductors
|
IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS |
| Artículo | 2017 |
An inductor modeling and optimization toolbox for RF circuit design
|
INTEGRATION-THE VLSI JOURNAL |
| Ponencia | 2017 |
CASE: A Reliability Simulation Tool for Analog ICs
|
2017 14TH INTERNATIONAL CONFERENCE ON SYNTHESIS, MODELING, ANALYSIS AND SIMULATION METHODS AND APPLICATIONS TO CIRCUIT DESIGN (SMACD) |
| Ponencia | 2017 |
Dependence of MOSFETs threshold voltage variability on channel dimensions
|
2017 JOINT INTERNATIONAL EUROSOI WORKSHOP AND INTERNATIONAL CONFERENCE ON ULTIMATE INTEGRATION ON SILICON (EUROSOI-ULIS 2017) |
| Ponencia | 2017 |
Extending the Frequency Range of Quasi-Static Electromagnetic Solvers
|
International Conference on Synthesis Modeling Analysis and Simulation Methods and Applications to Circuit Design |
| Ponencia | 2017 |
Including a Stochastic Model of Aging in a Reliability Simulation Flow
|
2017 14TH INTERNATIONAL CONFERENCE ON SYNTHESIS, MODELING, ANALYSIS AND SIMULATION METHODS AND APPLICATIONS TO CIRCUIT DESIGN (SMACD) |
| Editorial | 2017 |
Introduction to the special issue on PRIME 2016 and SMACD 2016
|
INTEGRATION-THE VLSI JOURNAL |
| Ponencia | 2017 |
Layout-Aware Challenges and a Solution for the Automatic Synthesis of Radio-Frequency IC Blocks
|
International Conference on Synthesis Modeling Analysis and Simulation Methods and Applications to Circuit Design |
| Ponencia | 2017 |
New Mapping Strategies for Pre-Optimized Inductor Sets in Bottom-Up RF IC Sizing Optimization
|
2017 14TH INTERNATIONAL CONFERENCE ON SYNTHESIS, MODELING, ANALYSIS AND SIMULATION METHODS AND APPLICATIONS TO CIRCUIT DESIGN (SMACD) |
| Ponencia | 2017 |
Optimization of a MEMS Accelerometer Using A Multiobjective Evolutionary Algorithm
|
2017 14TH INTERNATIONAL CONFERENCE ON SYNTHESIS, MODELING, ANALYSIS AND SIMULATION METHODS AND APPLICATIONS TO CIRCUIT DESIGN (SMACD) |
| Artículo | 2017 |
Parametric macromodeling of integrated inductors for rf circuit design
|
MICROWAVE AND OPTICAL TECHNOLOGY LETTERS |
| Artículo | 2017 |
Radio-frequency inductor synthesis using evolutionary computation and Gaussian-process surrogate modeling
|
APPLIED SOFT COMPUTING |
| Ponencia | 2017 |
Systematic Design of a Voltage Controlled Oscillator using a Layout-Aware Approach
|
2017 14TH INTERNATIONAL CONFERENCE ON SYNTHESIS, MODELING, ANALYSIS AND SIMULATION METHODS AND APPLICATIONS TO CIRCUIT DESIGN (SMACD) |
| Ponencia | 2017 |
TARS: A Toolbox for Statistical Reliability Modeling of CMOS Devices
|
International Conference on Synthesis Modeling Analysis and Simulation Methods and Applications to Circuit Design |
| Ponencia | 2016 |
Accurate Synthesis of Integrated RF Passive Components Using Surrogate Models
|
Design Automation and Test in Europe Conference and Exhibition |
| Artículo | 2016 |
Circuit Realization of the Synchronization of Two Chaotic Oscillators with Optimized Maximum Lyapunov Exponent
|
ADVANCES IN CHAOS THEORY AND INTELLIGENT CONTROL |
| Artículo | 2016 |
Comparison of QMC-based yield-aware pareto front techniques for multi-objective robust analog synthesis
|
INTEGRATION-THE VLSI JOURNAL |
| Ponencia | 2016 |
Frequency-Dependent Parameterized Macromodeling of Integrated Inductors
|
2016 13TH INTERNATIONAL CONFERENCE ON SYNTHESIS, MODELING, ANALYSIS AND SIMULATION METHODS AND APPLICATIONS TO CIRCUIT DESIGN (SMACD) |
| Editorial | 2016 |
Introduction to the special issue on SMACD 2015
|
INTEGRATION-THE VLSI JOURNAL |
| Ponencia | 2016 |
Optimization of LDO Voltage Regulators by NSGA-II
|
2016 13TH INTERNATIONAL CONFERENCE ON SYNTHESIS, MODELING, ANALYSIS AND SIMULATION METHODS AND APPLICATIONS TO CIRCUIT DESIGN (SMACD) |
| Artículo | 2016 |
Reliability simulation for analog ICs: Goals, solutions, and challenges
|
INTEGRATION-THE VLSI JOURNAL |
| Ponencia | 2016 |
SIDe-O: A Toolbox for Surrogate Inductor Design and Optimization
|
2016 13TH INTERNATIONAL CONFERENCE ON SYNTHESIS, MODELING, ANALYSIS AND SIMULATION METHODS AND APPLICATIONS TO CIRCUIT DESIGN (SMACD) |
| Ponencia | 2015 |
A Fast and Accurate Reliability Simulation Method for Analog Circuits
|
2015 INTERNATIONAL CONFERENCE ON SYNTHESIS, MODELING, ANALYSIS AND SIMULATION METHODS AND APPLICATIONS TO CIRCUIT DESIGN (SMACD) |
| Ponencia | 2015 |
A Two-Step Layout-in-the-loop Design Automation Tool
|
2015 IEEE 13TH INTERNATIONAL NEW CIRCUITS AND SYSTEMS CONFERENCE (NEWCAS) |
| Capítulo | 2015 |
Computational intelligence techniques for determining optimal performance trade-offs for RF inductors
|
Computational Intelligence in Analog and Mixed-Signal (AMS) and Radio-Frequency (RF) Circuit Design |
| Ponencia | 2015 |
Design Space Exploration Using Hierarchical Composition of Performance Models
|
2015 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS) |
| Ponencia | 2015 |
Integration of QMC Based Yield-Aware Pareto Front Techniques on MOEA/D for Robust Analog Synthesis
|
2015 INTERNATIONAL CONFERENCE ON SYNTHESIS, MODELING, ANALYSIS AND SIMULATION METHODS AND APPLICATIONS TO CIRCUIT DESIGN (SMACD) |
| Artículo | 2015 |
On the convex formulation of area for slicing floorplans
|
INTEGRATION-THE VLSI JOURNAL |
| Ponencia | 2015 |
Physical vs. surrogate models of passive RF devices
|
2015 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS) |
| Capítulo | 2015 |
SMAS: A generalized and efficient framework for computationally expensive electronic design optimization problems
|
Computational Intelligence in Analog and Mixed-Signal (AMS) and Radio-Frequency (RF) Circuit Design |
| Ponencia | 2015 |
Surrogate Modeling and Optimization of Inductor Performances using Kriging functions
|
2015 INTERNATIONAL CONFERENCE ON SYNTHESIS, MODELING, ANALYSIS AND SIMULATION METHODS AND APPLICATIONS TO CIRCUIT DESIGN (SMACD) |
| Ponencia | 2015 |
Transformation conditions of performance fronts of operational amplifiers
|
2015 INTERNATIONAL CONFERENCE ON SYNTHESIS, MODELING, ANALYSIS AND SIMULATION METHODS AND APPLICATIONS TO CIRCUIT DESIGN (SMACD) |
| Artículo | 2014 |
Analog Circuit Sizing with Fuzzy Specifications: Addressing Soft Constraints
|
AUTOMATED DESIGN OF ANALOG AND HIGH-FREQUENCY CIRCUITS: A COMPUTATIONAL INTELLIGENCE APPROACH |
| Editorial | 2014 |
Automated Design of Analog and High-frequency Circuits A Computational Intelligence Approach Preface
|
AUTOMATED DESIGN OF ANALOG AND HIGH-FREQUENCY CIRCUITS: A COMPUTATIONAL INTELLIGENCE APPROACH |
| Libro | 2014 |
Automated Design of Analog and High-frequency Circuits: A Computational Intelligence Approach
|
AUTOMATED DESIGN OF ANALOG AND HIGH-FREQUENCY CIRCUITS: A COMPUTATIONAL INTELLIGENCE APPROACH |
| Artículo | 2014 |
Automated Generation of the Optimal Performance Trade-Offs of Integrated Inductors
|
IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS |
| Artículo | 2014 |
Basic Concepts and Background
|
AUTOMATED DESIGN OF ANALOG AND HIGH-FREQUENCY CIRCUITS: A COMPUTATIONAL INTELLIGENCE APPROACH |
| Ponencia | 2014 |
Characterization of Random Telegraph Noise and its impact on reliability of SRAM sense amplifiers
|
2014 5TH EUROPEAN WORKSHOP ON CMOS VARIABILITY (VARI) |
| Artículo | 2014 |
Electromagnetic Design Automation: Surrogate Model Assisted Evolutionary Algorithm
|
AUTOMATED DESIGN OF ANALOG AND HIGH-FREQUENCY CIRCUITS: A COMPUTATIONAL INTELLIGENCE APPROACH |
| Artículo | 2014 |
Fundamentals of Optimization Techniques in Analog IC Sizing
|
AUTOMATED DESIGN OF ANALOG AND HIGH-FREQUENCY CIRCUITS: A COMPUTATIONAL INTELLIGENCE APPROACH |
| Artículo | 2014 |
Generation of surrogate models of Pareto-optimal performance trade-offs of planar inductors
|
ANALOG INTEGRATED CIRCUITS AND SIGNAL PROCESSING |
| Artículo | 2014 |
High-Performance Analog IC Sizing: Advanced Constraint Handling and Search Methods
|
AUTOMATED DESIGN OF ANALOG AND HIGH-FREQUENCY CIRCUITS: A COMPUTATIONAL INTELLIGENCE APPROACH |
| Ponencia | 2014 |
Implementation Issues in the Hierarchical Composition of Performance Models of Analog Circuits
|
Design Automation and Test in Europe Conference and Exhibition |
| Editorial | 2014 |
Introduction to the special issue on SMACD 2012
|
ANALOG INTEGRATED CIRCUITS AND SIGNAL PROCESSING |
| Artículo | 2014 |
Maximizing Lyapunov Exponents in a Chaotic Oscillator by Applying Differential Evolution
|
INTERNATIONAL JOURNAL OF NONLINEAR SCIENCES AND NUMERICAL SIMULATION |
| Artículo | 2014 |
mm-Wave Linear Amplifier Design Automation: A First Step to Complex Problems
|
AUTOMATED DESIGN OF ANALOG AND HIGH-FREQUENCY CIRCUITS: A COMPUTATIONAL INTELLIGENCE APPROACH |
| Artículo | 2014 |
mm-Wave Nonlinear IC and Complex Antenna Synthesis: Handling High Dimensionality
|
AUTOMATED DESIGN OF ANALOG AND HIGH-FREQUENCY CIRCUITS: A COMPUTATIONAL INTELLIGENCE APPROACH |
| Ponencia | 2014 |
Model Based Hierarchical Optimization Strategies for Analog Design Automation
|
Design Automation and Test in Europe Conference and Exhibition |
| Artículo | 2014 |
Ordinal Optimization-Based Methods for Efficient Variation-Aware Analog IC Sizing
|
AUTOMATED DESIGN OF ANALOG AND HIGH-FREQUENCY CIRCUITS: A COMPUTATIONAL INTELLIGENCE APPROACH |
| Artículo | 2014 |
Passive Components Synthesis at High Frequencies: Handling Prediction Uncertainty
|
AUTOMATED DESIGN OF ANALOG AND HIGH-FREQUENCY CIRCUITS: A COMPUTATIONAL INTELLIGENCE APPROACH |
| Artículo | 2014 |
Process Variation-Aware Analog Circuit Sizing: Uncertain Optimization
|
AUTOMATED DESIGN OF ANALOG AND HIGH-FREQUENCY CIRCUITS: A COMPUTATIONAL INTELLIGENCE APPROACH |
| Artículo | 2014 |
Template coding with LDS and applications of LDS in EDA
|
ANALOG INTEGRATED CIRCUITS AND SIGNAL PROCESSING |
| Artículo | 2013 |
An Efficient Evolutionary Algorithm for Chance-Constrained Bi-Objective Stochastic Optimization
|
IEEE TRANSACTIONS ON EVOLUTIONARY COMPUTATION |
| Ponencia | 2013 |
Area Optimization on Fixed Analog Floorplans using Convex Area Functions
|
Design Automation and Test in Europe Conference and Exhibition |
| Artículo | 2013 |
Behavioral Modeling of SNFS for Synthesizing Multi-Scroll Chaotic Attractors
|
INTERNATIONAL JOURNAL OF NONLINEAR SCIENCES AND NUMERICAL SIMULATION |
| Ponencia | 2013 |
Lumped Element Model for Arbitrarily Shaped Integrated Inductors - A Statistical Analysis
|
2013 IEEE INTERNATIONAL CONFERENCE ON MICROWAVES, COMMUNICATIONS, ANTENNAS AND ELECTRONICS SYSTEMS (IEEE COMCAS 2013) |
| Artículo | 2013 |
Optimizing the positive Lyapunov exponent in multi-scroll chaotic oscillators with differential evolution algorithm
|
APPLIED MATHEMATICS AND COMPUTATION |
| Ponencia | 2012 |
A fully automated design flow for planar inductors
|
2012 International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design, SMACD 2012 |
| Ponencia | 2012 |
An automated layout-aware design flow
|
2012 International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design, SMACD 2012 |
| Artículo | 2012 |
Approximation Techniques in Symbolic Circuit Analysis
|
DESIGN OF ANALOG CIRCUITS THROUGH SYMBOLIC ANALYSIS |
| Artículo | 2012 |
Context-dependent transformation of Pareto-optimal performance fronts of operational amplifiers
|
ANALOG INTEGRATED CIRCUITS AND SIGNAL PROCESSING |
| Libro | 2012 |
Design of analog circuits through symbolic analysis
|
DESIGN OF ANALOG CIRCUITS THROUGH SYMBOLIC ANALYSIS |
| Editorial | 2012 |
Design of Analog Circuits through Symbolic Analysis. Preface
|
DESIGN OF ANALOG CIRCUITS THROUGH SYMBOLIC ANALYSIS |
| Ponencia | 2012 |
LDS based tools to ease template construction
|
2012 International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design, SMACD 2012 |
| Ponencia | 2012 |
Self-adaptive Lower Confidence Bound: A New General and Effective Prescreening Method for Gaussian Process Surrogate Model Assisted Evolutionary Algorithms
|
2012 IEEE CONGRESS ON EVOLUTIONARY COMPUTATION (CEC) |
| Ponencia | 2012 |
Surrogate models of Pareto-optimal planar inductors
|
2012 International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design, SMACD 2012 |
| Artículo | 2012 |
Symbolic Pole/Zero Analysis
|
DESIGN OF ANALOG CIRCUITS THROUGH SYMBOLIC ANALYSIS |
| Ponencia | 2012 |
Systematic generation of performance models of reconfigurable analog circuits
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2012 International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design, SMACD 2012 |
| Ponencia | 2011 |
A template router
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2011 20th European Conference on Circuit Theory and Design, ECCTD 2011 |
| Artículo | 2011 |
Closing the Gap Between Electrical and Physical Design: The Layout-Aware Solution
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ANALOG LAYOUT SYNTHESIS: A SURVEY OF TOPOLOGICAL APPROACHES |
| Artículo | 2011 |
Efficient and Accurate Statistical Analog Yield Optimization and Variation-Aware Circuit Sizing Based on Computational Intelligence Techniques
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IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS |
| Ponencia | 2011 |
Layout-aware Pareto fronts of electronic circuits
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2011 20th European Conference on Circuit Theory and Design, ECCTD 2011 |
| Ponencia | 2011 |
LDS - A description script for layout templates
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2011 20th European Conference on Circuit Theory and Design, ECCTD 2011 |
| Artículo | 2011 |
Pathological Element-Based Active Device Models and Their Application to Symbolic Analysis
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IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS |
| Ponencia | 2010 |
A bottom-up approach to the systematic design of LNAs using evolutionary optimization
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2010 11th International Workshop on Symbolic and Numerical Methods, Modeling and Applications to Circuit Design, SM2ACD 2010 |
| Ponencia | 2010 |
An Accurate and Efficient Yield Optimization Method for Analog Circuits Based on Computing Budget Allocation and Memetic Search Technique
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Design Automation and Test in Europe Conference and Exhibition |
| Ponencia | 2010 |
An Enhanced MOEA/D-DE and Its Application to Multiobjective Analog Cell Sizing
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2010 IEEE CONGRESS ON EVOLUTIONARY COMPUTATION (CEC) |
| Ponencia | 2010 |
Context-independent performance modeling of operational amplifiers using Pareto fronts
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2010 11th International Workshop on Symbolic and Numerical Methods, Modeling and Applications to Circuit Design, SM2ACD 2010 |
| Artículo | 2010 |
Generalized admittance matrix models of OTRAs and COAs
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MICROELECTRONICS JOURNAL |
| Ponencia | 2010 |
Load-independent characterization of trade-off fronts for operational amplifiers
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XXV Conference on Design of Circuits and Integrated Systems (2010) |
| Ponencia | 2010 |
Multi-objective performance optimization of planar inductors
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2010 11th International Workshop on Symbolic and Numerical Methods, Modeling and Applications to Circuit Design, SM2ACD 2010 |
| Ponencia | 2010 |
Stopping criteria in evolutionary algorithms for multi-objective performance optimization of integrated inductors
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2010 IEEE CONGRESS ON EVOLUTIONARY COMPUTATION (CEC) |
| Ponencia | 2009 |
A Fuzzy Selection Based Constraint Handling Method for Multi-objective Optimization of Analog Cells
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2009 EUROPEAN CONFERENCE ON CIRCUIT THEORY AND DESIGN, VOLS 1 AND 2 |
| Artículo | 2009 |
A Memetic Approach to the Automatic Design of High-Performance Analog Integrated Circuits
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ACM TRANSACTIONS ON DESIGN AUTOMATION OF ELECTRONIC SYSTEMS |
| Revisión | 2009 |
Adaptive CMOS analog circuits for 4G mobile terminals-Review and state-of-the-art survey
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MICROELECTRONICS JOURNAL |
| Editorial | 2009 |
AMS/RF-CMOS circuit design for wireless transceivers
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INTEGRATION-THE VLSI JOURNAL |
| Artículo | 2009 |
Analog circuit optimization system based on hybrid evolutionary algorithms
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INTEGRATION-THE VLSI JOURNAL |
| Ponencia | 2009 |
Analog Layout Synthesis - Recent Advances in Topological Approaches
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Design Automation and Test in Europe Conference and Exhibition |
| Ponencia | 2009 |
Applications of evolutionary computation techniques to analog, Mixed-signal and RF circuit design - an overview
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2009 16th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2009 |
| Ponencia | 2009 |
Fuzzy Selection Based Differential Evolution Algorithm for Analog Cell Sizing Capturing Imprecise Human Intentions
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2009 IEEE CONGRESS ON EVOLUTIONARY COMPUTATION, VOLS 1-5 |
| Ponencia | 2009 |
Hierarchical synthesis based on Pareto-optimal fronts
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2009 EUROPEAN CONFERENCE ON CIRCUIT THEORY AND DESIGN, VOLS 1 AND 2 |
| Ponencia | 2009 |
Less expensive and high quality stopping criteria for MC-based analog IC yield optimization
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2009 16th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2009 |
| Artículo | 2009 |
Multimode Pareto fronts for design of reconfigurable analogue circuits
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ELECTRONICS LETTERS |
| Artículo | 2009 |
Systematic top-down design of reconfigurable I I" pound modulators for multi-standard transceivers
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ANALOG INTEGRATED CIRCUITS AND SIGNAL PROCESSING |
| Ponencia | 2009 |
Using Pareto-Optimal Fronts in the Design of Reconfigurable Data Converters
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2009 SECOND INTERNATIONAL CONFERENCE ON ADVANCES IN CIRCUITS, ELECTRONICS AND MICRO-ELECTRONICS |
| Artículo | 2008 |
An integrated layout-synthesis approach for analog ICs
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IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS |
| Artículo | 2008 |
Behavioral modeling, simulation and synthesis of multi-standard wireless receivers in MATLAB/SIMULINK
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INTEGRATION-THE VLSI JOURNAL |
| Artículo | 2008 |
Clock jitter error in multi-bit continuous-time sigma-delta modulators with non-return-to-zero feedback waveform
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MICROELECTRONICS JOURNAL |
| Editorial | 2008 |
Comments by the chairmen
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INTEGRATION-THE VLSI JOURNAL |
| Ponencia | 2008 |
Hierarchical design of reconfigurable analog circuits using multi-mode Pareto fronts
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SM2ACD 2008 - 10th International Workshop on Symbolic and Numerical Methods, Modeling and Applications to Circuit Design, Proceedings |
| Ponencia | 2008 |
MSOEA: A new methodology for synthesis of high performance analog integrated circuits
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SM2ACD 2008 - 10th International Workshop on Symbolic and Numerical Methods, Modeling and Applications to Circuit Design, Proceedings |
| Ponencia | 2008 |
Quality metrics of pareto-optimal fronts for multi-objective synthesis of analog ICs
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SM2ACD 2008 - 10th International Workshop on Symbolic and Numerical Methods, Modeling and Applications to Circuit Design, Proceedings |
| Artículo | 2008 |
Systematic design of high-resolution high-frequency cascade continuous-time sigma-delta modulators
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ETRI JOURNAL |
| Ponencia | 2007 |
A 12-bit@40MS/s Gm-C cascade 3-2 continuous-time sigma-delta modulator
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2007 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOLS 1-11 |
| Ponencia | 2007 |
A design tool for high-resolution high-frequency cascade continuous-time Sigma Delta modulators
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VLSI CIRCUITS AND SYSTEMS III |
| Ponencia | 2007 |
Towards systematic design of multi-standard converters
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VLSI CIRCUITS AND SYSTEMS III |
| Artículo | 2006 |
A new high-level synthesis methodology of cascaded continuous-time Sigma Delta modulators
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IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS |
| Ponencia | 2006 |
Design of a 1.2-V 130nmCMOS 13-bit@40MS/s cascade 2-2-1 continuous-time EA modulator
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IFIP VLSI-SoIC 2006 - IFIP WG 10.5 International Conference on Very Large Scale Integration and System-on-Chip |
| Ponencia | 2006 |
Design of a 1.2-V cascade continuous-time ∑Δ modulator for broadband telecommunications
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2006 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOLS 1-11, PROCEEDINGS |
| Ponencia | 2006 |
Reconfiguration of cascade ΣΔmodulators for multistandard GSM/bluetooth/UMTS/WLAN transceivers
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2006 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOLS 1-11, PROCEEDINGS |
| Libro | 2006 |
Reuse based methodologies and tools in the design of analog and mixed-signal integrated circuits
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Reuse Based Methodologies and Tools in the Design of Analog and Mixed-Signal Integrated Circuits |
| Ponencia | 2005 |
A direct synthesis method of cascaded continuous-time sigma-delta modulators
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2005 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS), VOLS 1-6, CONFERENCE PROCEEDINGS |
| Ponencia | 2005 |
A reuse-based framework for the design of analog and mixed-signal ICs
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VLSI CIRCUITS AND SYSTEMS II, PTS 1 AND 2 |
| Artículo | 2005 |
An approach to the design of cascade sigma/delta modulators for multistandard wireless transceivers
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WSEAS Transactions on Circuits and Systems |
| Ponencia | 2005 |
Analysis of clock jitter error in multibit continuous-time Sigma Delta modulators with NRZ feedback waveform
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2005 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS), VOLS 1-6, CONFERENCE PROCEEDINGS |
| Ponencia | 2005 |
Cascade continuous-time ΣΔ modulators with reduced number of analog compontents - Application to vdsl
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IET Conference Publications |
| Ponencia | 2005 |
Continuous-time cascaded Delta Sigma modulators for VDSL: A comparative study
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VLSI CIRCUITS AND SYSTEMS II, PTS 1 AND 2 |
| Ponencia | 2005 |
Effect of Clock Jitter Error on the Performance Degradation of Multi-bit Continuous-Time ΣΔ Modulators With NRZ DAC
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Conference on Design of Circuits and Integrated Systems (2005) |
| Ponencia | 2005 |
Geometrically-constrained, parasitic-aware synthesis of analog ICs
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VLSI CIRCUITS AND SYSTEMS II, PTS 1 AND 2 |
| Artículo | 2005 |
High-level synthesis of switched-capacitor, switched-current and continuous-time Sigma Delta modulators using SIMULINK-based time-domain behavioral models
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IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS |
| Ponencia | 2005 |
On the suitability and development of layout templates for analog layout reuse and layout-aware synthesis
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VLSI CIRCUITS AND SYSTEMS II, PTS 1 AND 2 |
| Ponencia | 2004 |
An optimization-based tool for the high-level synthesis of discrete-time and continuous-time ∑Δ modulators in the MATLAB/SIMULINK environment
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Proceedings - IEEE International Symposium on Circuits and Systems |
| Ponencia | 2004 |
MATLAB/SIMULINK-based high-level synthesis of discrete-time and continuous-time Σ Δ modulators
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Design Automation and Test in Europe Conference and Exhibition |
| Artículo | 2004 |
Synthesis of a wireless communication analog back-end based on a mismatch-aware symbolic approach
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ANALOG INTEGRATED CIRCUITS AND SIGNAL PROCESSING |
| Ponencia | 2003 |
Accurate VHDL-based simulation of Sigma Delta modulators
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Proceedings of the 2003 International Symposium on Circuits and Systems, 2003. ISCAS '03. |
| Editorial | 2003 |
Analog and mixed-signal IC design and design methodologies
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INTEGRATION-THE VLSI JOURNAL |
| Ponencia | 2003 |
Behavioural modelling and simulation of Sigma Delta modulators using hardware description languages
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Design Automation and Test in Europe Conference and Exhibition |
| Corrección | 2003 |
Erratum: Generation of technology-independent retargetable analog blocks (Analog Integrated Circuits and Signal Processing: An International Journal (November 2002) 33:2 (160))
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ANALOG INTEGRATED CIRCUITS AND SIGNAL PROCESSING |
| Capítulo | 2002 |
A statistical optimization-based approach for automated sizing of analog cells
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Computer-Aided Design of Analog Integrated Circuits and Systems |
| Artículo | 2002 |
A symbolic pole/zero extraction methodology based on analysis of circuit time-constants
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ANALOG INTEGRATED CIRCUITS AND SIGNAL PROCESSING |
| Artículo | 2002 |
Approximate symbolic analysis of hierarchically decomposed analog circuits
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ANALOG INTEGRATED CIRCUITS AND SIGNAL PROCESSING |
| Capítulo | 2002 |
Efficient symbolic computation of approximated small-signal characteristics of analog integrated circuits
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Computer-Aided Design of Analog Integrated Circuits and Systems |
| Artículo | 2002 |
Generation of technology-independent retargetable analog blocks
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ANALOG INTEGRATED CIRCUITS AND SIGNAL PROCESSING |
| Ponencia | 2002 |
Generation of technology-portable flexible analog blocks
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2002 IEEE International Symposium on Circuits and Systems (ISCAS) |
| Capítulo | 2002 |
Interactive ac modeling and characterization of analog circuits via symbolic analysis
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Computer-Aided Design of Analog Integrated Circuits and Systems |
| Ponencia | 2001 |
Creating flexible analogue IP blocks
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European Solid-State Circuits Conference |
| Ponencia | 2001 |
Retargeting of mixed-signal blocks for SoCs
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DESIGN, AUTOMATION AND TEST IN EUROPE, CONFERENCE AND EXHIBITION 2001, PROCEEDINGS |
| Ponencia | 2000 |
A hierarchical approach for the symbolic analysis of large analog integrated circuits
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Design Automation and Test in Europe Conference and Exhibition |
| Ponencia | 2000 |
An error-controlled methodology for approximate hierarchical symbolic analysis
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ISCAS 2000: IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS - PROCEEDINGS, VOL III |
| Ponencia | 2000 |
XFridge: A SPICE-based, portable, user-friendly cell-level sizing tool
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Design Automation and Test in Europe Conference and Exhibition |
| Ponencia | 1999 |
A tool for complete small-signal analytical modeling of large analog circuits
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Proceedings of the 3rd International Workshop on Design of Mixed-Mode Integrated Circuits and Applications |
| Ponencia | 1999 |
An accurate error control mechanism for simplification before generation algorithms
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DESIGN, AUTOMATION AND TEST IN EUROPE CONFERENCE AND EXHIBITION 1999, PROCEEDINGS |
| Corrección | 1999 |
Correction to 'Symbolic analysis of large analog integrated circuits: The numerical reference generation problem'
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IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-ANALOG AND DIGITAL SIGNAL PROCESSING |
| Artículo | 1999 |
Error control in simplification before generation algorithms for symbolic analysis of large analogue circuits
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ELECTRONICS LETTERS |
| Ponencia | 1999 |
RAPID-retargetability for reusability of application-driven quadrature D/A interface block design
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Proceedings of the IEEE International Conference on Electronics, Circuits, and Systems |
| Ponencia | 1998 |
Behavioral modeling of PWL analog circuits using symbolic analysis
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ISCAS '98 - PROCEEDINGS OF THE 1998 INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOLS 1-6 |
| Artículo | 1998 |
Simplification before and during generation methodology for symbolic large-circuit analysis
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Proceedings of the IEEE International Conference on Electronics, Circuits, and Systems |
| Artículo | 1998 |
Symbolic analysis of large analog integrated circuits: The numerical reference generation problem
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IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-ANALOG AND DIGITAL SIGNAL PROCESSING |
| Ponencia | 1997 |
An algorithm for numerical reference generation in symbolic analysis of large analog circuits
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EUROPEAN DESIGN & TEST CONFERENCE - ED&TC 97, PROCEEDINGS |
| Ponencia | 1997 |
Comparison of matroid intersection algorithms for large circuit analysis
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ISCAS '97 - PROCEEDINGS OF 1997 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOLS I - IV |
| Ponencia | 1997 |
Mismatch distance term compensation in centroid configurations with nonzero-area devices
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ISCAS '97 - PROCEEDINGS OF 1997 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOLS I - IV |
| Ponencia | 1996 |
Family of matroid intersection algorithms for the computation of approximated symbolic network functions
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Proceedings - IEEE International Symposium on Circuits and Systems |
| Ponencia | 1996 |
Symbolic analysis tools - The state-of-the-art
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1996 IEEE International Symposium on Circuits and Systems. Circuits and Systems Connecting the World. ISCAS 96 |
| Ponencia | 1995 |
A tool for fast mismatch analysis of analog circuits
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1995 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOLS 1-3 |
| Nota | 1995 |
Efficient symbolic computation of approximated small-signal characteristics of analog integrated-circuits
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IEEE JOURNAL OF SOLID-STATE CIRCUITS |
| Ponencia | 1994 |
A statistical optimization-based approach for automated sizing of analog cells
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1994 IEEE/ACM INTERNATIONAL CONFERENCE ON COMPUTER-AIDED DESIGN - DIGEST OF TECHNICAL PAPERS |
| Artículo | 1994 |
Algorithm for efficient symbolic analysis of large analog circuits
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ELECTRONICS LETTERS |
| Ponencia | 1994 |
Efficient symbolic computation of approximated small-signal characteristics
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PROCEEDINGS OF THE IEEE 1994 CUSTOM INTEGRATED CIRCUITS CONFERENCE |
| Artículo | 1994 |
Global design of analog cells using statistical optimization techniques
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ANALOG INTEGRATED CIRCUITS AND SIGNAL PROCESSING |
| Ponencia | 1994 |
Pleasures, perils and pitfalls of symbolic analysis
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1994 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOL 1 |
| Ponencia | 1994 |
Symbolic analysis of large analog integrated circuits by approximation during expression generation
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1994 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOL 1 |
| Ponencia | 1994 |
Un algoritmo para el análisis simbólico de circuitos integrados analógicos de gran tamaño
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Actas del IX Congreso de Diseño de Circuitos Integrados, 9, 10 y 11 de noviembre de 1994, Maspalomas, Gran Canaria |
| Ponencia | 1994 |
Una herramienta para la simulación del desapareamiento en circuitos analógicos
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Actas del IX Congreso de Diseño de Circuitos Integrados, 9, 10 y 11 de noviembre de 1994, Maspalomas, Gran Canaria |
| Ponencia | 1993 |
A tool for optimum design of analog cells with reduced variance
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PROCEEDINGS OF THE 36TH MIDWEST SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOLS 1 AND 2 |
| Ponencia | 1993 |
Diseño automático de celdas analógicas mediante técnicas basadas en simulación
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VIII Congreso Diseño de Circuitos Integrados: Málaga, 9 al 11 de noviembre de 1993 |
| Artículo | 1993 |
Formula approximation for flat and hierarchical symbolic analysis
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ANALOG INTEGRATED CIRCUITS AND SIGNAL PROCESSING |
| Corrección | 1993 |
Formula approximation for flat and hierarchical symbolic analysis (Vol 3, PG 58, 1992)
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ANALOG INTEGRATED CIRCUITS AND SIGNAL PROCESSING |
| Ponencia | 1992 |
Accurate simplification of large symbolic formulae
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IEEE/ACM International Conference on Computer-Aided Design |
| Ponencia | 1992 |
On simplification techniques for symbolic analysis of analog integrated circuits
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Proceedings - IEEE International Symposium on Circuits and Systems |
| Ponencia | 1992 |
Técnicas de simplificación en el análisis simbólico de circuitos integrados analógicos
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VII Congreso de Diseño de Circuitos Integrados: 3, 4 y 5 de noviembre de 1992, Toledo, España : actas |
| Ponencia | 1991 |
An advanced symbolic analyzer for the automatic generation of analog circuit design equations
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Proceedings - IEEE International Symposium on Circuits and Systems |
| Ponencia | 1991 |
Caracterización automática de circuitos integrados analógicos vía análisis simbólico
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Diseño de circuitos integrados: actas del VI Congreso, Santander, 11/15 de noviembre de 1991 |
| Artículo | 1991 |
Interactive AC modeling and characterization of analog circuits via symbolic analysis
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ANALOG INTEGRATED CIRCUITS AND SIGNAL PROCESSING |
| Ponencia | 1991 |
Modelado dinámico comparativo de espejos de corriente CMOS
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Diseño de circuitos integrados: actas del VI Congreso, Santander, 11/15 de noviembre de 1991 |
| Ponencia | 1991 |
Modelado y caracterización de BJTs laterales en tecnologías CMOS<3[mi]m
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Diseño de circuitos integrados: actas del VI Congreso, Santander, 11/15 de noviembre de 1991 |
| Ponencia | 1990 |
Automatic modeling of analog circuits in a portable electrical analysis CAD framework
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ESSCIRC 90 |
