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Ver Investigador - - Prisma - Unidad de Bibliometría

Francisco Vidal Fernández Fernández

Catedrático de Universidad
pacov@us.es
Área de conocimiento: Electrónica
Departamento: Electrónica y Electromagnetismo
Grupo: INGENIERÍA DE CIRCUITOS Y SISTEMAS MICRO/NANO-MÉTRICOS - TIC-026 (Universidad de Sevilla)
Centro mixto: Instituto de Microelectrónica de Sevilla (IMSE)
Prog. doctorado: CIENCIAS Y TECNOLOGÍAS FÍSICAS

Investiga en

Palabras clave
Líneas de investigación
Resumen
Tipo Año Título Fuente
Artículo2024 A Comprehensive Approach to Improving the Thermal Reliability of RTN-Based PUFs IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS
Editorial2024 Guest editorial special issue on selected papers from SMACD 2023 AEU-INTERNATIONAL JOURNAL OF ELECTRONICS AND COMMUNICATIONS
Artículo2024 Reliability improvement of SRAM PUFs based on a detailed experimental study into the stochastic effects of aging AEU-INTERNATIONAL JOURNAL OF ELECTRONICS AND COMMUNICATIONS
Ponencia2023 A detailed, cell-by-cell look into the effects of aging on an SRAM PUF using a specialized test array Proceedings - 2023 19th International Conference on Synthesis, Modeling, Analysis and Simulation Methods, and Applications to Circuit Design, SMACD 2023
Ponencia2023 A Peak Detect & Hold circuit to measure and exploit RTN in a 65-nm CMOS PUF Proceedings - 2023 19th International Conference on Synthesis, Modeling, Analysis and Simulation Methods, and Applications to Circuit Design, SMACD 2023
Ponencia2023 A Test Module for Aging Characterization of Digital Circuits Proceedings - 2023 19th International Conference on Synthesis, Modeling, Analysis and Simulation Methods, and Applications to Circuit Design, SMACD 2023
Ponencia2023 Challenges and solutions to the defect-centric modeling and circuit simulation of time-dependent variability IEEE International Reliability Physics Symposium Proceedings
Ponencia2023 Design considerations for a CMOS 65-nm RTN-based PUF Proceedings - 2023 19th International Conference on Synthesis, Modeling, Analysis and Simulation Methods, and Applications to Circuit Design, SMACD 2023
Artículo2023 PACOSYT: A Passive Component Synthesis Tool Based on Machine Learning and Tailored Modeling Strategies Towards Optimal RF and mm-Wave Circuit Designs IEEE Journal of Microwaves
Ponencia2023 Reliability evaluation of IC Ring Oscillator PUFs Proceedings - 2023 19th International Conference on Synthesis, Modeling, Analysis and Simulation Methods, and Applications to Circuit Design, SMACD 2023
Ponencia2023 Strategies for parameter extraction of the time constant distribution of time-dependent variability models for nanometer-scale devices Proceedings - 2023 19th International Conference on Synthesis, Modeling, Analysis and Simulation Methods, and Applications to Circuit Design, SMACD 2023
Artículo2022 A DRV-based bit selection method for SRAM PUF key generation and its impact on ECCs INTEGRATION-THE VLSI JOURNAL
Ponencia2022 A novel physical unclonable function using RTN Proceedings - IEEE International Symposium on Circuits and Systems
Ponencia2022 A smart SRAM-cell array for the experimental study of variability phenomena in CMOS technologies IEEE International Reliability Physics Symposium Proceedings
Ponencia2022 A systematic approach to RTN parameter fitting based on the Maximum Current Fluctuation Proceedings - 2022 18th International Conference on Synthesis, Modeling, Analysis and Simulation Methods, and Applications to Circuit Design, SMACD 2022
Artículo2022 Addressing a new class of multi-objective passive device optimization for radiofrequency circuit design ELECTRONICS
Ponencia2022 Characterization and analysis of BTI and HCI effects in CMOS current mirrors Proceedings - 2022 18th International Conference on Synthesis, Modeling, Analysis and Simulation Methods, and Applications to Circuit Design, SMACD 2022
Ponencia2022 Characterizing Aging Degradation of Integrated Circuits with a Versatile Custom Array of Reliability Test Structures IEEE International Conference on Microelectronic Test Structures
Artículo2022 Determination of the time constant distribution of a defect-centric time-dependent variability model for Sub-100-nm FETs IEEE TRANSACTIONS ON ELECTRON DEVICES
Ponencia2022 High-level design of a novel PUF based on RTN Proceedings - 2022 18th International Conference on Synthesis, Modeling, Analysis and Simulation Methods, and Applications to Circuit Design, SMACD 2022
Ponencia2022 Impact of BTI and HCI on the reliability of a Majority Voter Proceedings - 2022 18th International Conference on Synthesis, Modeling, Analysis and Simulation Methods, and Applications to Circuit Design, SMACD 2022
Ponencia2022 Machine learning approaches for transformer modeling Proceedings - 2022 18th International Conference on Synthesis, Modeling, Analysis and Simulation Methods, and Applications to Circuit Design, SMACD 2022
Artículo2022 On the Impact of the Biasing History on the Characterization of Random Telegraph Noise IEEE TRANSACTIONS ON INSTRUMENTATION AND MEASUREMENT
Ponencia2022 On the use of an RTN simulator to explore the quality trade-offs of a novel RTN-based PUF Proceedings - 2022 18th International Conference on Synthesis, Modeling, Analysis and Simulation Methods, and Applications to Circuit Design, SMACD 2022
Ponencia2021 A study of SRAM PUFs reliability using the static noise margin SMACD / PRIME 2021 - International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design and 16th Conference on PhD Research in Microelectronics and Electronics
Artículo2021 An efficient transformer modeling approach for mm-wave circuit design AEU-INTERNATIONAL JOURNAL OF ELECTRONICS AND COMMUNICATIONS
Ponencia2021 Circuit reliability prediction: challenges and solutions for the device time-dependent variability characterization roadblock LAEDC 2021 - IEEE Latin America Electron Devices Conference
Ponencia2021 Dealing with hierarchical partitioning in bottom-up design methodologies SMACD / PRIME 2021 - International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design and 16th Conference on PhD Research in Microelectronics and Electronics
Artículo2021 Hierarchical yield-aware synthesis methodology covering device-, circuit-, and system-level for radiofrequency ICs IEEE ACCESS
Artículo2021 Improving the reliability of SRAM-based PUFs under varying operation conditions and aging degradation MICROELECTRONICS RELIABILITY
Ponencia2021 Simulating the impact of random telegraph noise on integrated circuits SMACD / PRIME 2021 - International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design and 16th Conference on PhD Research in Microelectronics and Electronics
Artículo2021 Statistical characterization of time-dependent variability defects using the maximum current fluctuation IEEE TRANSACTIONS ON ELECTRON DEVICES
Artículo2021 Statistical threshold voltage shifts caused by BTI and HCI at nominal and accelerated conditions SOLID-STATE ELECTRONICS
Artículo2021 Unified RTN and BTI statistical compact modeling from a defect-centric perspective SOLID-STATE ELECTRONICS
Artículo2020 A Multilevel Bottom-Up Optimization Methodology for the Automated Synthesis of RF Systems IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS
Artículo2020 A robust and automated methodology for the analysis of Time-Dependent Variability at transistor level INTEGRATION-THE VLSI JOURNAL
Artículo2020 Chaotic image encryption using hopfield and hindmarsh–rose neurons implemented on FPGA SENSORS
Artículo2020 Flexible Setup for the Measurement of CMOS Time-Dependent Variability with Array-Based Integrated Circuits IEEE TRANSACTIONS ON INSTRUMENTATION AND MEASUREMENT
Ponencia2020 Improving the reliability of SRAM-based PUFs in the presence of aging Proceedings - 2020 15th IEEE International Conference on Design and Technology of Integrated Systems in Nanoscale Era, DTIS 2020
Capítulo2020 Modeling of variability and reliability in analog circuits Modelling methodologies in analogue integrated circuit design
Capítulo2020 On the usage of machine-learning techniques for the accurate modeling of integrated inductors for RF applications Modelling methodologies in analogue integrated circuit design
Artículo2020 Ready-to-fabricate RF circuit synthesis using a layout- And variability-aware optimization-based methodology IEEE ACCESS
Artículo2020 Synthesis of mm-Wave Wideband Receivers in 28nm CMOS Technology for Automotive Radar Applications IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS
Artículo2020 Yield-aware multi-objective optimization of a MEMS accelerometer system using QMC-based methodologies MICROELECTRONICS JOURNAL
Artículo2019 A detailed study of the gate/drain voltage dependence of RTN in bulk pMOS transistors MICROELECTRONIC ENGINEERING
Ponencia2019 A New Time Efficient Methodology for the Massive Characterization of RTN in CMOS Devices 2019 IEEE INTERNATIONAL RELIABILITY PHYSICS SYMPOSIUM (IRPS)
Artículo2019 A smart noise- and RTN-removal method for parameter extraction of CMOS aging compact models SOLID-STATE ELECTRONICS
Artículo2019 A two-step surrogate modeling strategy for single-objective and multi-objective optimization of radiofrequency circuits SOFT COMPUTING
Artículo2019 A Versatile CMOS Transistor Array IC for the Statistical Characterization of Time-Zero Variability, RTN, BTI, and HCI IEEE JOURNAL OF SOLID-STATE CIRCUITS
Ponencia2019 An IC array for the statistical characterization of time-dependent variability of basic circuit blocks SMACD 2019 - 16th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design, Proceedings
Ponencia2019 Experimental characterization of time-dependent variability in ring oscillators SMACD 2019 - 16th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design, Proceedings
Ponencia2019 Generation of Lifetime-Aware Pareto-Optimal Fronts Using a Stochastic Reliability Simulator Design Automation and Test in Europe Conference and Exhibition
Ponencia2019 New method for the automated massive characterization of Bias Temperature Instability in CMOS transistors Design Automation and Test in Europe Conference and Exhibition
Artículo2019 Optimization and CMOS design of chaotic oscillators robust to PVT variations: INVITED INTEGRATION-THE VLSI JOURNAL
Ponencia2019 Synthesis of mm-Wave circuits using-EM-simulated passive structure libraries SMACD 2019 - 16th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design, Proceedings
Ponencia2019 TiDeVa: A Toolbox for the Automated and Robust Analysis of Time-Dependent Variability at Transistor Level SMACD 2019 - 16th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design, Proceedings
Artículo2019 Two-Step RF IC Block Synthesis with Pre-Optimized Inductors and Full Layout Generation In-the-loop IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS
Artículo2018 A Comparison of Automated RF Circuit Design Methodologies: Online Versus Offline Passive Component Design IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS
Ponencia2018 A Model Parameter Extraction Methodology Including Time-Dependent Variability for Circuit Reliability Simulation SMACD 2018 - 15th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design
Ponencia2018 A noise and RTN-removal smart method for parameters extraction of CMOS aging compact models 2018 Joint International EUROSOI Workshop and International Conference on Ultimate Integration on Silicon, EUROSOI-ULIS 2018
Artículo2018 A novel design methodology for the mixed-domain optimization of a MEMS accelerometer INTEGRATION-THE VLSI JOURNAL
Ponencia2018 Analysis of Body Bias and RTN-induced Frequency Shift of Low Voltage Ring Oscillators in FDSOI Technology 2018 28TH INTERNATIONAL SYMPOSIUM ON POWER AND TIMING MODELING, OPTIMIZATION AND SIMULATION (PATMOS)
Ponencia2018 Automated Massive RTN Characterization Using a Transistor Array Chip SMACD 2018 - 15th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design
Ponencia2018 CMOS Characterization and Compact Modelling for Circuit Reliability Simulation 2018 IEEE 24th International Symposium on On-Line Testing and Robust System Design, IOLTS 2018
Ponencia2018 Design considerations of an SRAM array for the statistical validation of time-dependent variability models SMACD 2018 - 15th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design
Artículo2018 Enhanced systematic design of a voltage controlled oscillator using a two-step optimization methodology INTEGRATION-THE VLSI JOURNAL
Editorial2018 Guest Editorial Special Issue on Selected Papers from PRIME 2017 and SMACD 2017 INTEGRATION-THE VLSI JOURNAL
Ponencia2018 Handling the Effects of Variability and Layout Parasitics in the Automatic Synthesis of LNAs SMACD 2018 - 15th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design
Ponencia2018 Lifetime Calculation Using a Stochastic Reliability Simulator for Analog ICs SMACD 2018 - 15th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design
Artículo2018 PVT-Robust CMOS Programmable Chaotic Oscillator: Synchronization of Two 7-Scroll Attractors ELECTRONICS
Artículo2018 Quasi-static PEEC planar solver using a weighted combination of 2D and 3D analytical Green's functions and a predictive meshing generator INTEGRATION-THE VLSI JOURNAL
Ponencia2018 Weighted time lag plot defect parameter extraction and GPU-based BTI modeling for BTI variability 2018 IEEE INTERNATIONAL RELIABILITY PHYSICS SYMPOSIUM (IRPS)
Ponencia2017 A size-adaptive time-step algorithm for accurate simulation of aging in analog ICs 2017 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS)
Ponencia2017 A strategy to efficiently include electromagnetic simulations in optimization-based RF circuit design methodologies 2017 IEEE MTT-S INTERNATIONAL CONFERENCE ON NUMERICAL ELECTROMAGNETIC AND MULTIPHYSICS MODELING AND OPTIMIZATION FOR RF, MICROWAVE, AND TERAHERTZ APPLICATIONS (NEMO)
Ponencia2017 A transistor array chip for the statistical characterization of process variability, RTN and BTI/CHC aging International Conference on Synthesis Modeling Analysis and Simulation Methods and Applications to Circuit Design
Ponencia2017 An algorithm for a class of real-life multi-objective optimization problems with a sweeping objective 2017 IEEE CONGRESS ON EVOLUTIONARY COMPUTATION (CEC)
Artículo2017 An Automated Design Methodology of RF Circuits by Using Pareto-Optimal Fronts of EM-Simulated Inductors IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS
Artículo2017 An inductor modeling and optimization toolbox for RF circuit design INTEGRATION-THE VLSI JOURNAL
Ponencia2017 CASE: A Reliability Simulation Tool for Analog ICs 2017 14TH INTERNATIONAL CONFERENCE ON SYNTHESIS, MODELING, ANALYSIS AND SIMULATION METHODS AND APPLICATIONS TO CIRCUIT DESIGN (SMACD)
Ponencia2017 Dependence of MOSFETs threshold voltage variability on channel dimensions 2017 JOINT INTERNATIONAL EUROSOI WORKSHOP AND INTERNATIONAL CONFERENCE ON ULTIMATE INTEGRATION ON SILICON (EUROSOI-ULIS 2017)
Ponencia2017 Extending the Frequency Range of Quasi-Static Electromagnetic Solvers International Conference on Synthesis Modeling Analysis and Simulation Methods and Applications to Circuit Design
Ponencia2017 Including a Stochastic Model of Aging in a Reliability Simulation Flow 2017 14TH INTERNATIONAL CONFERENCE ON SYNTHESIS, MODELING, ANALYSIS AND SIMULATION METHODS AND APPLICATIONS TO CIRCUIT DESIGN (SMACD)
Editorial2017 Introduction to the special issue on PRIME 2016 and SMACD 2016 INTEGRATION-THE VLSI JOURNAL
Ponencia2017 Layout-Aware Challenges and a Solution for the Automatic Synthesis of Radio-Frequency IC Blocks International Conference on Synthesis Modeling Analysis and Simulation Methods and Applications to Circuit Design
Ponencia2017 New Mapping Strategies for Pre-Optimized Inductor Sets in Bottom-Up RF IC Sizing Optimization 2017 14TH INTERNATIONAL CONFERENCE ON SYNTHESIS, MODELING, ANALYSIS AND SIMULATION METHODS AND APPLICATIONS TO CIRCUIT DESIGN (SMACD)
Ponencia2017 Optimization of a MEMS Accelerometer Using A Multiobjective Evolutionary Algorithm 2017 14TH INTERNATIONAL CONFERENCE ON SYNTHESIS, MODELING, ANALYSIS AND SIMULATION METHODS AND APPLICATIONS TO CIRCUIT DESIGN (SMACD)
Artículo2017 Parametric macromodeling of integrated inductors for rf circuit design MICROWAVE AND OPTICAL TECHNOLOGY LETTERS
Artículo2017 Radio-frequency inductor synthesis using evolutionary computation and Gaussian-process surrogate modeling APPLIED SOFT COMPUTING
Ponencia2017 Systematic Design of a Voltage Controlled Oscillator using a Layout-Aware Approach 2017 14TH INTERNATIONAL CONFERENCE ON SYNTHESIS, MODELING, ANALYSIS AND SIMULATION METHODS AND APPLICATIONS TO CIRCUIT DESIGN (SMACD)
Ponencia2017 TARS: A Toolbox for Statistical Reliability Modeling of CMOS Devices International Conference on Synthesis Modeling Analysis and Simulation Methods and Applications to Circuit Design
Ponencia2016 Accurate Synthesis of Integrated RF Passive Components Using Surrogate Models Design Automation and Test in Europe Conference and Exhibition
Artículo2016 Circuit Realization of the Synchronization of Two Chaotic Oscillators with Optimized Maximum Lyapunov Exponent ADVANCES IN CHAOS THEORY AND INTELLIGENT CONTROL
Artículo2016 Comparison of QMC-based yield-aware pareto front techniques for multi-objective robust analog synthesis INTEGRATION-THE VLSI JOURNAL
Ponencia2016 Frequency-Dependent Parameterized Macromodeling of Integrated Inductors 2016 13TH INTERNATIONAL CONFERENCE ON SYNTHESIS, MODELING, ANALYSIS AND SIMULATION METHODS AND APPLICATIONS TO CIRCUIT DESIGN (SMACD)
Editorial2016 Introduction to the special issue on SMACD 2015 INTEGRATION-THE VLSI JOURNAL
Ponencia2016 Optimization of LDO Voltage Regulators by NSGA-II 2016 13TH INTERNATIONAL CONFERENCE ON SYNTHESIS, MODELING, ANALYSIS AND SIMULATION METHODS AND APPLICATIONS TO CIRCUIT DESIGN (SMACD)
Artículo2016 Reliability simulation for analog ICs: Goals, solutions, and challenges INTEGRATION-THE VLSI JOURNAL
Ponencia2016 SIDe-O: A Toolbox for Surrogate Inductor Design and Optimization 2016 13TH INTERNATIONAL CONFERENCE ON SYNTHESIS, MODELING, ANALYSIS AND SIMULATION METHODS AND APPLICATIONS TO CIRCUIT DESIGN (SMACD)
Ponencia2015 A Fast and Accurate Reliability Simulation Method for Analog Circuits 2015 INTERNATIONAL CONFERENCE ON SYNTHESIS, MODELING, ANALYSIS AND SIMULATION METHODS AND APPLICATIONS TO CIRCUIT DESIGN (SMACD)
Ponencia2015 A Two-Step Layout-in-the-loop Design Automation Tool 2015 IEEE 13TH INTERNATIONAL NEW CIRCUITS AND SYSTEMS CONFERENCE (NEWCAS)
Capítulo2015 Computational intelligence techniques for determining optimal performance trade-offs for RF inductors Computational Intelligence in Analog and Mixed-Signal (AMS) and Radio-Frequency (RF) Circuit Design
Ponencia2015 Design Space Exploration Using Hierarchical Composition of Performance Models 2015 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS)
Ponencia2015 Integration of QMC Based Yield-Aware Pareto Front Techniques on MOEA/D for Robust Analog Synthesis 2015 INTERNATIONAL CONFERENCE ON SYNTHESIS, MODELING, ANALYSIS AND SIMULATION METHODS AND APPLICATIONS TO CIRCUIT DESIGN (SMACD)
Artículo2015 On the convex formulation of area for slicing floorplans INTEGRATION-THE VLSI JOURNAL
Ponencia2015 Physical vs. surrogate models of passive RF devices 2015 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS)
Capítulo2015 SMAS: A generalized and efficient framework for computationally expensive electronic design optimization problems Computational Intelligence in Analog and Mixed-Signal (AMS) and Radio-Frequency (RF) Circuit Design
Ponencia2015 Surrogate Modeling and Optimization of Inductor Performances using Kriging functions 2015 INTERNATIONAL CONFERENCE ON SYNTHESIS, MODELING, ANALYSIS AND SIMULATION METHODS AND APPLICATIONS TO CIRCUIT DESIGN (SMACD)
Ponencia2015 Transformation conditions of performance fronts of operational amplifiers 2015 INTERNATIONAL CONFERENCE ON SYNTHESIS, MODELING, ANALYSIS AND SIMULATION METHODS AND APPLICATIONS TO CIRCUIT DESIGN (SMACD)
Artículo2014 Analog Circuit Sizing with Fuzzy Specifications: Addressing Soft Constraints AUTOMATED DESIGN OF ANALOG AND HIGH-FREQUENCY CIRCUITS: A COMPUTATIONAL INTELLIGENCE APPROACH
Editorial2014 Automated Design of Analog and High-frequency Circuits A Computational Intelligence Approach Preface AUTOMATED DESIGN OF ANALOG AND HIGH-FREQUENCY CIRCUITS: A COMPUTATIONAL INTELLIGENCE APPROACH
Libro2014 Automated Design of Analog and High-frequency Circuits: A Computational Intelligence Approach AUTOMATED DESIGN OF ANALOG AND HIGH-FREQUENCY CIRCUITS: A COMPUTATIONAL INTELLIGENCE APPROACH
Artículo2014 Automated Generation of the Optimal Performance Trade-Offs of Integrated Inductors IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS
Artículo2014 Basic Concepts and Background AUTOMATED DESIGN OF ANALOG AND HIGH-FREQUENCY CIRCUITS: A COMPUTATIONAL INTELLIGENCE APPROACH
Ponencia2014 Characterization of Random Telegraph Noise and its impact on reliability of SRAM sense amplifiers 2014 5TH EUROPEAN WORKSHOP ON CMOS VARIABILITY (VARI)
Artículo2014 Electromagnetic Design Automation: Surrogate Model Assisted Evolutionary Algorithm AUTOMATED DESIGN OF ANALOG AND HIGH-FREQUENCY CIRCUITS: A COMPUTATIONAL INTELLIGENCE APPROACH
Artículo2014 Fundamentals of Optimization Techniques in Analog IC Sizing AUTOMATED DESIGN OF ANALOG AND HIGH-FREQUENCY CIRCUITS: A COMPUTATIONAL INTELLIGENCE APPROACH
Artículo2014 Generation of surrogate models of Pareto-optimal performance trade-offs of planar inductors ANALOG INTEGRATED CIRCUITS AND SIGNAL PROCESSING
Artículo2014 High-Performance Analog IC Sizing: Advanced Constraint Handling and Search Methods AUTOMATED DESIGN OF ANALOG AND HIGH-FREQUENCY CIRCUITS: A COMPUTATIONAL INTELLIGENCE APPROACH
Ponencia2014 Implementation Issues in the Hierarchical Composition of Performance Models of Analog Circuits Design Automation and Test in Europe Conference and Exhibition
Editorial2014 Introduction to the special issue on SMACD 2012 ANALOG INTEGRATED CIRCUITS AND SIGNAL PROCESSING
Artículo2014 Maximizing Lyapunov Exponents in a Chaotic Oscillator by Applying Differential Evolution INTERNATIONAL JOURNAL OF NONLINEAR SCIENCES AND NUMERICAL SIMULATION
Artículo2014 mm-Wave Linear Amplifier Design Automation: A First Step to Complex Problems AUTOMATED DESIGN OF ANALOG AND HIGH-FREQUENCY CIRCUITS: A COMPUTATIONAL INTELLIGENCE APPROACH
Artículo2014 mm-Wave Nonlinear IC and Complex Antenna Synthesis: Handling High Dimensionality AUTOMATED DESIGN OF ANALOG AND HIGH-FREQUENCY CIRCUITS: A COMPUTATIONAL INTELLIGENCE APPROACH
Ponencia2014 Model Based Hierarchical Optimization Strategies for Analog Design Automation Design Automation and Test in Europe Conference and Exhibition
Artículo2014 Ordinal Optimization-Based Methods for Efficient Variation-Aware Analog IC Sizing AUTOMATED DESIGN OF ANALOG AND HIGH-FREQUENCY CIRCUITS: A COMPUTATIONAL INTELLIGENCE APPROACH
Artículo2014 Passive Components Synthesis at High Frequencies: Handling Prediction Uncertainty AUTOMATED DESIGN OF ANALOG AND HIGH-FREQUENCY CIRCUITS: A COMPUTATIONAL INTELLIGENCE APPROACH
Artículo2014 Process Variation-Aware Analog Circuit Sizing: Uncertain Optimization AUTOMATED DESIGN OF ANALOG AND HIGH-FREQUENCY CIRCUITS: A COMPUTATIONAL INTELLIGENCE APPROACH
Artículo2014 Template coding with LDS and applications of LDS in EDA ANALOG INTEGRATED CIRCUITS AND SIGNAL PROCESSING
Artículo2013 An Efficient Evolutionary Algorithm for Chance-Constrained Bi-Objective Stochastic Optimization IEEE TRANSACTIONS ON EVOLUTIONARY COMPUTATION
Ponencia2013 Area Optimization on Fixed Analog Floorplans using Convex Area Functions Design Automation and Test in Europe Conference and Exhibition
Artículo2013 Behavioral Modeling of SNFS for Synthesizing Multi-Scroll Chaotic Attractors INTERNATIONAL JOURNAL OF NONLINEAR SCIENCES AND NUMERICAL SIMULATION
Ponencia2013 Lumped Element Model for Arbitrarily Shaped Integrated Inductors - A Statistical Analysis 2013 IEEE INTERNATIONAL CONFERENCE ON MICROWAVES, COMMUNICATIONS, ANTENNAS AND ELECTRONICS SYSTEMS (IEEE COMCAS 2013)
Artículo2013 Optimizing the positive Lyapunov exponent in multi-scroll chaotic oscillators with differential evolution algorithm APPLIED MATHEMATICS AND COMPUTATION
Ponencia2012 A fully automated design flow for planar inductors 2012 International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design, SMACD 2012
Ponencia2012 An automated layout-aware design flow 2012 International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design, SMACD 2012
Artículo2012 Approximation Techniques in Symbolic Circuit Analysis DESIGN OF ANALOG CIRCUITS THROUGH SYMBOLIC ANALYSIS
Artículo2012 Context-dependent transformation of Pareto-optimal performance fronts of operational amplifiers ANALOG INTEGRATED CIRCUITS AND SIGNAL PROCESSING
Libro2012 Design of analog circuits through symbolic analysis DESIGN OF ANALOG CIRCUITS THROUGH SYMBOLIC ANALYSIS
Editorial2012 Design of Analog Circuits through Symbolic Analysis. Preface DESIGN OF ANALOG CIRCUITS THROUGH SYMBOLIC ANALYSIS
Ponencia2012 LDS based tools to ease template construction 2012 International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design, SMACD 2012
Ponencia2012 Self-adaptive Lower Confidence Bound: A New General and Effective Prescreening Method for Gaussian Process Surrogate Model Assisted Evolutionary Algorithms 2012 IEEE CONGRESS ON EVOLUTIONARY COMPUTATION (CEC)
Ponencia2012 Surrogate models of Pareto-optimal planar inductors 2012 International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design, SMACD 2012
Artículo2012 Symbolic Pole/Zero Analysis DESIGN OF ANALOG CIRCUITS THROUGH SYMBOLIC ANALYSIS
Ponencia2012 Systematic generation of performance models of reconfigurable analog circuits 2012 International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design, SMACD 2012
Ponencia2011 A template router 2011 20th European Conference on Circuit Theory and Design, ECCTD 2011
Artículo2011 Closing the Gap Between Electrical and Physical Design: The Layout-Aware Solution ANALOG LAYOUT SYNTHESIS: A SURVEY OF TOPOLOGICAL APPROACHES
Artículo2011 Efficient and Accurate Statistical Analog Yield Optimization and Variation-Aware Circuit Sizing Based on Computational Intelligence Techniques IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS
Ponencia2011 Layout-aware Pareto fronts of electronic circuits 2011 20th European Conference on Circuit Theory and Design, ECCTD 2011
Ponencia2011 LDS - A description script for layout templates 2011 20th European Conference on Circuit Theory and Design, ECCTD 2011
Artículo2011 Pathological Element-Based Active Device Models and Their Application to Symbolic Analysis IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS
Ponencia2010 A bottom-up approach to the systematic design of LNAs using evolutionary optimization 2010 11th International Workshop on Symbolic and Numerical Methods, Modeling and Applications to Circuit Design, SM2ACD 2010
Ponencia2010 An Accurate and Efficient Yield Optimization Method for Analog Circuits Based on Computing Budget Allocation and Memetic Search Technique Design Automation and Test in Europe Conference and Exhibition
Ponencia2010 An Enhanced MOEA/D-DE and Its Application to Multiobjective Analog Cell Sizing 2010 IEEE CONGRESS ON EVOLUTIONARY COMPUTATION (CEC)
Ponencia2010 Context-independent performance modeling of operational amplifiers using Pareto fronts 2010 11th International Workshop on Symbolic and Numerical Methods, Modeling and Applications to Circuit Design, SM2ACD 2010
Artículo2010 Generalized admittance matrix models of OTRAs and COAs MICROELECTRONICS JOURNAL
Ponencia2010 Load-independent characterization of trade-off fronts for operational amplifiers XXV Conference on Design of Circuits and Integrated Systems (2010)
Ponencia2010 Multi-objective performance optimization of planar inductors 2010 11th International Workshop on Symbolic and Numerical Methods, Modeling and Applications to Circuit Design, SM2ACD 2010
Ponencia2010 Stopping criteria in evolutionary algorithms for multi-objective performance optimization of integrated inductors 2010 IEEE CONGRESS ON EVOLUTIONARY COMPUTATION (CEC)
Ponencia2009 A Fuzzy Selection Based Constraint Handling Method for Multi-objective Optimization of Analog Cells 2009 EUROPEAN CONFERENCE ON CIRCUIT THEORY AND DESIGN, VOLS 1 AND 2
Artículo2009 A Memetic Approach to the Automatic Design of High-Performance Analog Integrated Circuits ACM TRANSACTIONS ON DESIGN AUTOMATION OF ELECTRONIC SYSTEMS
Revisión2009 Adaptive CMOS analog circuits for 4G mobile terminals-Review and state-of-the-art survey MICROELECTRONICS JOURNAL
Editorial2009 AMS/RF-CMOS circuit design for wireless transceivers INTEGRATION-THE VLSI JOURNAL
Artículo2009 Analog circuit optimization system based on hybrid evolutionary algorithms INTEGRATION-THE VLSI JOURNAL
Ponencia2009 Analog Layout Synthesis - Recent Advances in Topological Approaches Design Automation and Test in Europe Conference and Exhibition
Ponencia2009 Applications of evolutionary computation techniques to analog, Mixed-signal and RF circuit design - an overview 2009 16th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2009
Ponencia2009 Fuzzy Selection Based Differential Evolution Algorithm for Analog Cell Sizing Capturing Imprecise Human Intentions 2009 IEEE CONGRESS ON EVOLUTIONARY COMPUTATION, VOLS 1-5
Ponencia2009 Hierarchical synthesis based on Pareto-optimal fronts 2009 EUROPEAN CONFERENCE ON CIRCUIT THEORY AND DESIGN, VOLS 1 AND 2
Ponencia2009 Less expensive and high quality stopping criteria for MC-based analog IC yield optimization 2009 16th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2009
Artículo2009 Multimode Pareto fronts for design of reconfigurable analogue circuits ELECTRONICS LETTERS
Artículo2009 Systematic top-down design of reconfigurable I I" pound modulators for multi-standard transceivers ANALOG INTEGRATED CIRCUITS AND SIGNAL PROCESSING
Ponencia2009 Using Pareto-Optimal Fronts in the Design of Reconfigurable Data Converters 2009 SECOND INTERNATIONAL CONFERENCE ON ADVANCES IN CIRCUITS, ELECTRONICS AND MICRO-ELECTRONICS
Artículo2008 An integrated layout-synthesis approach for analog ICs IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS
Artículo2008 Behavioral modeling, simulation and synthesis of multi-standard wireless receivers in MATLAB/SIMULINK INTEGRATION-THE VLSI JOURNAL
Artículo2008 Clock jitter error in multi-bit continuous-time sigma-delta modulators with non-return-to-zero feedback waveform MICROELECTRONICS JOURNAL
Editorial2008 Comments by the chairmen INTEGRATION-THE VLSI JOURNAL
Ponencia2008 Hierarchical design of reconfigurable analog circuits using multi-mode Pareto fronts SM2ACD 2008 - 10th International Workshop on Symbolic and Numerical Methods, Modeling and Applications to Circuit Design, Proceedings
Ponencia2008 MSOEA: A new methodology for synthesis of high performance analog integrated circuits SM2ACD 2008 - 10th International Workshop on Symbolic and Numerical Methods, Modeling and Applications to Circuit Design, Proceedings
Ponencia2008 Quality metrics of pareto-optimal fronts for multi-objective synthesis of analog ICs SM2ACD 2008 - 10th International Workshop on Symbolic and Numerical Methods, Modeling and Applications to Circuit Design, Proceedings
Artículo2008 Systematic design of high-resolution high-frequency cascade continuous-time sigma-delta modulators ETRI JOURNAL
Ponencia2007 A 12-bit@40MS/s Gm-C cascade 3-2 continuous-time sigma-delta modulator 2007 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOLS 1-11
Ponencia2007 A design tool for high-resolution high-frequency cascade continuous-time Sigma Delta modulators VLSI CIRCUITS AND SYSTEMS III
Ponencia2007 Towards systematic design of multi-standard converters VLSI CIRCUITS AND SYSTEMS III
Artículo2006 A new high-level synthesis methodology of cascaded continuous-time Sigma Delta modulators IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS
Ponencia2006 Design of a 1.2-V 130nmCMOS 13-bit@40MS/s cascade 2-2-1 continuous-time EA modulator IFIP VLSI-SoIC 2006 - IFIP WG 10.5 International Conference on Very Large Scale Integration and System-on-Chip
Ponencia2006 Design of a 1.2-V cascade continuous-time ∑Δ modulator for broadband telecommunications 2006 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOLS 1-11, PROCEEDINGS
Ponencia2006 Reconfiguration of cascade ΣΔmodulators for multistandard GSM/bluetooth/UMTS/WLAN transceivers 2006 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOLS 1-11, PROCEEDINGS
Libro2006 Reuse based methodologies and tools in the design of analog and mixed-signal integrated circuits Reuse Based Methodologies and Tools in the Design of Analog and Mixed-Signal Integrated Circuits
Ponencia2005 A direct synthesis method of cascaded continuous-time sigma-delta modulators 2005 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS), VOLS 1-6, CONFERENCE PROCEEDINGS
Ponencia2005 A reuse-based framework for the design of analog and mixed-signal ICs VLSI CIRCUITS AND SYSTEMS II, PTS 1 AND 2
Artículo2005 An approach to the design of cascade sigma/delta modulators for multistandard wireless transceivers WSEAS Transactions on Circuits and Systems
Ponencia2005 Analysis of clock jitter error in multibit continuous-time Sigma Delta modulators with NRZ feedback waveform 2005 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS), VOLS 1-6, CONFERENCE PROCEEDINGS
Ponencia2005 Cascade continuous-time ΣΔ modulators with reduced number of analog compontents - Application to vdsl IET Conference Publications
Ponencia2005 Continuous-time cascaded Delta Sigma modulators for VDSL: A comparative study VLSI CIRCUITS AND SYSTEMS II, PTS 1 AND 2
Ponencia2005 Effect of Clock Jitter Error on the Performance Degradation of Multi-bit Continuous-Time ΣΔ Modulators With NRZ DAC Conference on Design of Circuits and Integrated Systems (2005)
Ponencia2005 Geometrically-constrained, parasitic-aware synthesis of analog ICs VLSI CIRCUITS AND SYSTEMS II, PTS 1 AND 2
Artículo2005 High-level synthesis of switched-capacitor, switched-current and continuous-time Sigma Delta modulators using SIMULINK-based time-domain behavioral models IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS
Ponencia2005 On the suitability and development of layout templates for analog layout reuse and layout-aware synthesis VLSI CIRCUITS AND SYSTEMS II, PTS 1 AND 2
Ponencia2004 An optimization-based tool for the high-level synthesis of discrete-time and continuous-time ∑Δ modulators in the MATLAB/SIMULINK environment Proceedings - IEEE International Symposium on Circuits and Systems
Ponencia2004 MATLAB/SIMULINK-based high-level synthesis of discrete-time and continuous-time Σ Δ modulators Design Automation and Test in Europe Conference and Exhibition
Artículo2004 Synthesis of a wireless communication analog back-end based on a mismatch-aware symbolic approach ANALOG INTEGRATED CIRCUITS AND SIGNAL PROCESSING
Ponencia2003 Accurate VHDL-based simulation of Sigma Delta modulators Proceedings of the 2003 International Symposium on Circuits and Systems, 2003. ISCAS '03.
Editorial2003 Analog and mixed-signal IC design and design methodologies INTEGRATION-THE VLSI JOURNAL
Ponencia2003 Behavioural modelling and simulation of Sigma Delta modulators using hardware description languages Design Automation and Test in Europe Conference and Exhibition
Corrección2003 Erratum: Generation of technology-independent retargetable analog blocks (Analog Integrated Circuits and Signal Processing: An International Journal (November 2002) 33:2 (160)) ANALOG INTEGRATED CIRCUITS AND SIGNAL PROCESSING
Capítulo2002 A statistical optimization-based approach for automated sizing of analog cells Computer-Aided Design of Analog Integrated Circuits and Systems
Artículo2002 A symbolic pole/zero extraction methodology based on analysis of circuit time-constants ANALOG INTEGRATED CIRCUITS AND SIGNAL PROCESSING
Artículo2002 Approximate symbolic analysis of hierarchically decomposed analog circuits ANALOG INTEGRATED CIRCUITS AND SIGNAL PROCESSING
Capítulo2002 Efficient symbolic computation of approximated small-signal characteristics of analog integrated circuits Computer-Aided Design of Analog Integrated Circuits and Systems
Artículo2002 Generation of technology-independent retargetable analog blocks ANALOG INTEGRATED CIRCUITS AND SIGNAL PROCESSING
Ponencia2002 Generation of technology-portable flexible analog blocks 2002 IEEE International Symposium on Circuits and Systems (ISCAS)
Capítulo2002 Interactive ac modeling and characterization of analog circuits via symbolic analysis Computer-Aided Design of Analog Integrated Circuits and Systems
Ponencia2001 Creating flexible analogue IP blocks European Solid-State Circuits Conference
Ponencia2001 Retargeting of mixed-signal blocks for SoCs DESIGN, AUTOMATION AND TEST IN EUROPE, CONFERENCE AND EXHIBITION 2001, PROCEEDINGS
Ponencia2000 A hierarchical approach for the symbolic analysis of large analog integrated circuits Design Automation and Test in Europe Conference and Exhibition
Ponencia2000 An error-controlled methodology for approximate hierarchical symbolic analysis ISCAS 2000: IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS - PROCEEDINGS, VOL III
Ponencia2000 XFridge: A SPICE-based, portable, user-friendly cell-level sizing tool Design Automation and Test in Europe Conference and Exhibition
Ponencia1999 A tool for complete small-signal analytical modeling of large analog circuits Proceedings of the 3rd International Workshop on Design of Mixed-Mode Integrated Circuits and Applications
Ponencia1999 An accurate error control mechanism for simplification before generation algorithms DESIGN, AUTOMATION AND TEST IN EUROPE CONFERENCE AND EXHIBITION 1999, PROCEEDINGS
Corrección1999 Correction to 'Symbolic analysis of large analog integrated circuits: The numerical reference generation problem' IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-ANALOG AND DIGITAL SIGNAL PROCESSING
Artículo1999 Error control in simplification before generation algorithms for symbolic analysis of large analogue circuits ELECTRONICS LETTERS
Ponencia1999 RAPID-retargetability for reusability of application-driven quadrature D/A interface block design Proceedings of the IEEE International Conference on Electronics, Circuits, and Systems
Ponencia1998 Behavioral modeling of PWL analog circuits using symbolic analysis ISCAS '98 - PROCEEDINGS OF THE 1998 INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOLS 1-6
Artículo1998 Simplification before and during generation methodology for symbolic large-circuit analysis Proceedings of the IEEE International Conference on Electronics, Circuits, and Systems
Artículo1998 Symbolic analysis of large analog integrated circuits: The numerical reference generation problem IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-ANALOG AND DIGITAL SIGNAL PROCESSING
Ponencia1997 An algorithm for numerical reference generation in symbolic analysis of large analog circuits EUROPEAN DESIGN & TEST CONFERENCE - ED&TC 97, PROCEEDINGS
Ponencia1997 Comparison of matroid intersection algorithms for large circuit analysis ISCAS '97 - PROCEEDINGS OF 1997 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOLS I - IV
Ponencia1997 Mismatch distance term compensation in centroid configurations with nonzero-area devices ISCAS '97 - PROCEEDINGS OF 1997 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOLS I - IV
Ponencia1996 Family of matroid intersection algorithms for the computation of approximated symbolic network functions Proceedings - IEEE International Symposium on Circuits and Systems
Ponencia1996 Symbolic analysis tools - The state-of-the-art 1996 IEEE International Symposium on Circuits and Systems. Circuits and Systems Connecting the World. ISCAS 96
Ponencia1995 A tool for fast mismatch analysis of analog circuits 1995 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOLS 1-3
Nota1995 Efficient symbolic computation of approximated small-signal characteristics of analog integrated-circuits IEEE JOURNAL OF SOLID-STATE CIRCUITS
Ponencia1994 A statistical optimization-based approach for automated sizing of analog cells 1994 IEEE/ACM INTERNATIONAL CONFERENCE ON COMPUTER-AIDED DESIGN - DIGEST OF TECHNICAL PAPERS
Artículo1994 Algorithm for efficient symbolic analysis of large analog circuits ELECTRONICS LETTERS
Ponencia1994 Efficient symbolic computation of approximated small-signal characteristics PROCEEDINGS OF THE IEEE 1994 CUSTOM INTEGRATED CIRCUITS CONFERENCE
Artículo1994 Global design of analog cells using statistical optimization techniques ANALOG INTEGRATED CIRCUITS AND SIGNAL PROCESSING
Ponencia1994 Pleasures, perils and pitfalls of symbolic analysis 1994 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOL 1
Ponencia1994 Symbolic analysis of large analog integrated circuits by approximation during expression generation 1994 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOL 1
Ponencia1994 Un algoritmo para el análisis simbólico de circuitos integrados analógicos de gran tamaño Actas del IX Congreso de Diseño de Circuitos Integrados, 9, 10 y 11 de noviembre de 1994, Maspalomas, Gran Canaria
Ponencia1994 Una herramienta para la simulación del desapareamiento en circuitos analógicos Actas del IX Congreso de Diseño de Circuitos Integrados, 9, 10 y 11 de noviembre de 1994, Maspalomas, Gran Canaria
Ponencia1993 A tool for optimum design of analog cells with reduced variance PROCEEDINGS OF THE 36TH MIDWEST SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOLS 1 AND 2
Ponencia1993 Diseño automático de celdas analógicas mediante técnicas basadas en simulación VIII Congreso Diseño de Circuitos Integrados: Málaga, 9 al 11 de noviembre de 1993
Artículo1993 Formula approximation for flat and hierarchical symbolic analysis ANALOG INTEGRATED CIRCUITS AND SIGNAL PROCESSING
Corrección1993 Formula approximation for flat and hierarchical symbolic analysis (Vol 3, PG 58, 1992) ANALOG INTEGRATED CIRCUITS AND SIGNAL PROCESSING
Ponencia1992 Accurate simplification of large symbolic formulae IEEE/ACM International Conference on Computer-Aided Design
Ponencia1992 On simplification techniques for symbolic analysis of analog integrated circuits Proceedings - IEEE International Symposium on Circuits and Systems
Ponencia1992 Técnicas de simplificación en el análisis simbólico de circuitos integrados analógicos VII Congreso de Diseño de Circuitos Integrados: 3, 4 y 5 de noviembre de 1992, Toledo, España : actas
Ponencia1991 An advanced symbolic analyzer for the automatic generation of analog circuit design equations Proceedings - IEEE International Symposium on Circuits and Systems
Ponencia1991 Caracterización automática de circuitos integrados analógicos vía análisis simbólico Diseño de circuitos integrados: actas del VI Congreso, Santander, 11/15 de noviembre de 1991
Artículo1991 Interactive AC modeling and characterization of analog circuits via symbolic analysis ANALOG INTEGRATED CIRCUITS AND SIGNAL PROCESSING
Ponencia1991 Modelado dinámico comparativo de espejos de corriente CMOS Diseño de circuitos integrados: actas del VI Congreso, Santander, 11/15 de noviembre de 1991
Ponencia1991 Modelado y caracterización de BJTs laterales en tecnologías CMOS<3[mi]m Diseño de circuitos integrados: actas del VI Congreso, Santander, 11/15 de noviembre de 1991
Ponencia1990 Automatic modeling of analog circuits in a portable electrical analysis CAD framework ESSCIRC 90
Técnicas de análisis simbólico para el modelado y diseño de circuitos integrados analógicos (1992)
Dirigida por: Ángel Benito Rodríguez Vázquez
Tesis dirigidas/tutorizadas:9
Fecha lectura Título Rol
13/03/2024 Design of a hardware Root-of-Trust on embedded systems Director/a, Tutor/a
12/11/2021 Study of variability phenomena on CMOS technologies for its mitigation and exploitation Director/a
17/09/2021 IMPACTO DE LA VARIABILIDAD DEPENDIENTE DEL TIEMPO EN CIRCUITOS INTEGRADOS EN TECNOLOGÍAS NANOMÉTRICAS: MODELADO, SIMULACIÓN Y CARACTERIZACIÓN EXPERIMENTAL Director/a, Tutor/a
13/04/2018 UNA APROXIMACIÓN MULTINIVEL AL DISEÑO SISTEMÁTICO DE CIRCUITOS INTEGRADOS DE RADIOFRECUENCIA Director/a
29/09/2017 DISEÑO DE CIRCUITOS ANALÓGICOS Y DE SEÑAL MIXTA CON CONSIDERACIONES DE DISEÑO FÍSICO Y VARIABILIDAD Director/a
15/09/2017 DISEÑO SISTEMÁTICO DE CIRCUITOS ANALÓGICOS Y DE SEÑAL MIXTA RECONFIGURABLES Tutor/a
20/06/2011 SENSORES DE VISIÓN DE BAJO CONSUMO DE POTENCIA PARA VIGILANCIA Y MONITORIZACIÓN EN RED Tutor/a
22/04/2005 METODOLOGÍAS Y HERRAMIENTAS DE REUSABILIDAD EN EL DISEÑO DE CIRCUITOS INTEGRADOS ANALÓGICOS Y DE SEÑAL MIXTA Director/a
20/09/2002 TÉCNICAS AVANZADAS PARA EL ANÁLISIS SIMBÓLICO APROXIMADO DE CIRCUITOS INTEGRADOS ANALÓGICOS Director/a

Proyectos de Investigación

Fecha de inicio Fecha de fin Rol Denominación Agencia financiadora
01/11/1998 31/03/2001 Investigador/a TECHNICAL COORDINATION AND DISSEMINATION ON RE-TARGETABLE RE-USABLE MIXED-SIGNAL DESIGN (IC&D EP 29648)
01/06/2020 29/02/2024 Responsable The Variability Challenge in Nano-CMOS: from Device Modeling to IC Design for Mitigation and Exploitation (Vigilant-Imse) (PID2019-103869RB-C31) Ministerio de Ciencia, Innovación y Universidades (Nacional)
31/01/2008 31/12/2012 Responsable Platform4g: Desarrollo de una Plataforma de Diseño de Sistemas Adaptables para Sistemas de Telecomunicaciones de Cuarta Generación (P07-TIC-02532) Junta de Andalucía - Consejería de Innovación, Ciencia y Empresas (Autonómico)
30/01/2014 16/02/2019 Responsable Flexics: Técnicas de Diseño de Circuitos y Sistemas Micro-Nanoelectrónicos Flexibles y Reconfigurables de Bajo Consumo y Bajo Coste Aplicados a Comunicaciones Inalámbricas (P12-TIC-1481) Consejería de Economía, Innovación y Ciencia (Autonómico)
01/01/2014 31/12/2018 Responsable Aproximación Multinivel al Diseño Orientado a la Fiabilidad de Circuitos Integrados Analógicos y Digitales (TEC2013-45638-C3-3-R) Ministerio de Economía y Competitividad (Nacional)
30/12/2016 29/06/2021 Responsable Dispositivos, Circuitos y Arquitecturas Fiables y de Bajo Consumo para Iot (TEC2016-75151-C3-3-R) Ministerio de Economía y Competitividad (Nacional)
01/01/2022 11/12/2023 Investigador/a Power, reliability and security challenges in advanced CMOS and beyond-CMOS devices and circuits (RESURGENCE) (US-1380876) Consejería de Economía, Conocimiento, Empresas y Universidad (Autonómico)
01/01/2011 31/03/2015 Investigador/a Circuitos Analógicos Flexibles para la Próxima Generación de Terminales Móviles Basados en Radio Definida por Software Integrados en Tecnologías CMOS Nanométricas (TEC2010-14825) Ministerio de Ciencia e Innovación (Nacional)
01/09/2023 31/08/2027 Responsable Fiabilidad, seguridad y eficiencia energética en dispositivos y circuitos electrónicos para IoT edge (TIRELESS-IMSE) (PID2022-136949OB-C21) Ministerio de Ciencia e Innovación (Nacional)

Contratos

Fecha de inicio Fecha de fin Rol Denominación Agencia financiadora
17/07/1998 31/12/1998 Responsable MICROELECTRÓNICA: TECNOLOGÍA, DISEÑO Y TEST (OG-006/99)
17/07/1998 31/12/1998 Responsable MICROELECTRÓNICA: TECNOLOGÍA, DISEÑO Y TEST (OG-007/99)
17/07/1998 31/12/1998 Responsable MICROELECTRÓNICA: TECNOLOGÍA, DISEÑO Y TEST (OG-005/99)
17/07/1998 31/12/1998 Responsable MICROELECTRÓNICA: TECNOLOGÍA, DISEÑO Y TEST (OG-008/99)
27/09/2002 31/12/2002 Responsable Microelectrónica: tecnología, diseño y test (OG-037/03) Consejo Superior de Investigaciones Científicas (Desconocido)
04/01/2005 31/03/2005 Investigador/a Microelectrónica: tecnología, diseño y test (OG-120/05) Consejo Superior de Investigaciones Científicas (Desconocido)
03/07/2001 31/12/2001 Investigador/a Microelectrónica: tecnología, diseño y test (ESPRIT 25213 - TARDIS) (OG-021/02) Consejo Superior de Investigaciones Científicas (Instituto de Microelectrónica de Sevilla) (Desconocido)
22/07/2003 31/12/2003 Investigador/a Microelectrónica: tecnología, diseño y test (OG-082/04) Consejo Superior de Investigaciones Científicas (Desconocido)
03/07/2001 31/12/2001 Investigador/a Microelectrónica: tecnología, diseño y test (MIXMODEST-29261) (OG-019/02) Consejo Superior de Investigaciones Científicas (Desconocido)
03/07/2001 31/12/2001 Responsable Microelectrónica: tecnología, diseño y test (ESPRIT 21812 - AMADEUS) (OG-024/02) Consejo Superior de Investigaciones Científicas (Instituto de Microelectrónica de Sevilla) (Desconocido)
07/03/2024 30/06/2026 Investigador/a USECHIP: CÁTEDRA EN MICROELECTRÓNICA DE LA UNIVERSIDAD DE SEVILLA (TSI-069100-2023-001) Ministerio de Asuntos Económicos y Transformación Digital (Local)

Ayudas

Fecha de inicio Fecha de fin Rol Denominación Agencia financiadora
19/04/2012 21/04/2012 Responsable International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (PP2011-01-078) Universidad de Sevilla (Local)
El investigador no tiene ningún resultado de investigación asociado